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STA Engineer

On-site Full-time

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Experience Level

Mid to Senior

Qualifications

• Bachelor’s or Master’s degree in Engineering (B. Tech. / M. Tech.)• 5-8 years of experience in synthesis and STA• Proficient in TCL and Perl scripting

About the job

We are seeking a skilled STA Engineer with a proven track record in synthesis and Static Timing Analysis (STA). The ideal candidate will hold a B. Tech. or M. Tech. degree and possess 5-8 years of relevant experience.

The responsibilities include:

  • Expertise in synthesizing complex System on Chips (SoCs) at both block and top levels.
  • Proficient in writing timing constraints for intricate designs featuring multiple clocks and voltage domains.
  • Hands-on experience with post-layout timing closure for various tape-outs, including timing ECOs and STA signoff.
  • Development of I/O constraints for industry-standard protocols such as DDR1/2/3, SDR, LPDDR, Flash, SPI, Ethernet, USBHS, USBFS, JTAG, and Display.
  • Familiarity with technology nodes including 28nm, 20nm, 14nm, and 10nm.
  • Proficient in using EDA tools such as RC, DC, PT, and PTSI.
  • Experience in formal verification of RTL-to-netlist and netlist-to-netlist with DFT constraints.
  • Solid understanding of VLSI processes and device characteristics, as well as deep submicron parasitic and crosstalk effects.
  • Proficiency in scripting languages such as TCL and Perl.

About FiniteHR Consulting

FiniteHR Consulting is a leading consulting firm specializing in providing innovative solutions to clients. Our mission is to empower organizations with the best talent and technology to achieve their goals.

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