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Physical Design Engineer at Etched | San Jose

EtchedSan Jose
On-site Full-time

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Experience Level

Mid to Senior

Qualifications

5-10+ years of relevant experience in Physical DesignProficiency with tools, workflows, and design methodologies spanning RTL synthesis to GDSII sign-offExperience in back-end design and timing closure on advanced process nodes (5nm and below)Familiarity with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler) automated RTL-to-GDSII flowsKnowledge of sign-off tools (PrimeTime, Tempus, Voltus, etc.)Expertise in UPF-based low power design methodologies, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysisCreative problem-solving skills with a first-principles approach

About the job

About Etched

At Etched, we are at the forefront of innovation, developing the world’s first AI inference system that is meticulously designed for transformers. Our technology offers over 10x the performance of traditional systems like the B200, while significantly reducing costs and latency. With our advanced ASICs, we empower the creation of groundbreaking products, enabling real-time video generation and complex reasoning models that surpass the capabilities of GPU-based systems. Supported by substantial investments from prominent industry leaders and a team of top-tier engineers, Etched is reshaping the infrastructure of the fastest-growing sector in history.

Job Summary

We are seeking highly skilled Physical Design Engineers to join our dynamic team. In this pivotal role, you will take charge of block-level implementation and verification, spearhead timing closure and PPA optimization, oversee third-party design collaborations, and enhance our design workflows and iteration speed.

Key Responsibilities

  • Gain a comprehensive understanding of the physical design process

  • Execute PD flows to achieve block closure, support ASIC infrastructure, automate PD processes, and refine CAD tools

  • Collaborate with RTL Designers to provide insightful Physical Design feedback aimed at enhancing PPA

  • Develop and manage dashboards that track project convergence related to PD

  • Optimize tool workflows by partnering with EDA vendors to adopt the latest features

  • Take responsibility for achieving block-level closure

  • Oversee the outsourcing of physical design tasks to third-party service providers

You may be a great fit if you possess the following qualifications:

  • 5-10+ years of relevant experience in Physical Design

  • Proficiency with tools, workflows, and design methodologies spanning RTL synthesis to GDSII sign-off

  • Experience in back-end design and timing closure on advanced process nodes (5nm and below)

  • Familiarity with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler) automated RTL-to-GDSII flows

  • Knowledge of sign-off tools (PrimeTime, Tempus, Voltus, etc.)

  • Expertise in UPF-based low power design methodologies, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis

  • Creative problem-solving skills with a first-principles approach

About Etched

Etched is redefining the AI landscape with its groundbreaking technology. Our unique AI inference system for transformers outperforms traditional methods, pushing the boundaries of what is possible in real-time video and complex reasoning applications. With significant backing from leading investors and a team of experts, we are transforming the future of technology.

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