About the job
About Etched
Etched is pioneering the world’s first AI inference system specifically designed for transformers, achieving over 10 times greater performance and significantly reduced costs and latency compared to traditional solutions like B200. Our ASICs enable the development of products that were previously unattainable with GPUs, including real-time video generation models and highly advanced parallel reasoning agents. With substantial backing from leading investors and a team of exceptional engineers, Etched is transforming the infrastructure landscape for one of the fastest-growing industries.
Job Summary
We are on the lookout for a talented Design Verification Engineer to join our Interface IP DV team. In this role, you will collaborate with architects, designers, and vendors to ensure that all architectural requirements are flawlessly integrated into the IP subsystems and interfaces we are developing. You will validate the correctness and performance across the entire hardware-software stack. This position requires creativity, strong technical skills, and a passion for overcoming complex verification challenges.
Key Responsibilities
- Take complete ownership of one or more IP subsystems, including PCIe, Ethernet, CPU (ARC/ARM), low-power peripherals, and sensors.
- Comprehend vendor IP configurations and facilitate communication with the internal IP team.
- Develop and maintain UVM/SystemVerilog-based verification environments to ensure functional correctness, performance, and compliance with IP specifications.
- Collaborate with integration and SoC DV teams to ensure the seamless operation of external IPs within the overall chip architecture.
- Drive coverage closure and sign-off by defining metrics, analyzing gaps, and ensuring thorough verification across corner cases and stress scenarios.

