About the job
SeviTech is seeking a skilled Senior/Lead Design Engineer specializing in IP/SoC RTL. In this pivotal role, you will drive the micro-architecture development and RTL coding at the IP/sub-system level.
Key Responsibilities:
- Develop micro-architecture and RTL for IP/sub-systems.
- Establish block/sub-system level timing constraints.
- Integrate IP/sub-systems effectively.
- Conduct basic verification within an IP Verification environment or via FPGA.

