About the job
Position: Senior FPGA Design Engineer
Location: Redmond, Washington
Employment Type: Contract (Potential for Permanent)
Duration: Long-Term (6 to 24 months)
Start Date: As Soon As Possible
Key Responsibilities:
- Lead FPGA and Modem design projects with a focus on Ultrascale+ and Versal architectures.
- Develop and simulate designs using VHDL and SystemVerilog.
- Implement high-speed SerDes interfaces.
- Utilize strong scripting skills in languages such as Python, Perl, Bash, and Tcl.
- Design and integrate communication interfaces including Ethernet, Interlocken, PCIe, SPI, I2C, and UART.
Required Qualifications:
- Minimum of 10 years of experience in FPGA/Modem design.
- Extensive knowledge of Ultrascale+ and Versal technology.
- Proficiency in VHDL and SystemVerilog for design and simulation.
- Experience with high-speed SerDes technology.
- Strong scripting capabilities in Python, Perl, Bash, Tcl, or similar languages.
- Familiarity with communication protocols such as Ethernet, Interlocken, PCIe, SPI, I2C, and UART.
Preferred Qualifications:
- Active government clearance.
- Background in Software Defined Radio or Modem design.
- Experience with Petalinux.
- Knowledge of RF design principles.
- Experience with encryption technologies.
Benefits:
- A2E does not accept unsolicited resumes or referrals from sources other than the candidate and will not consider unsolicited referrals as part of our hiring process.
- Any unsolicited resumes sent to A2E will be considered the property of A2E.
- A2E will not pay a fee for any placement resulting from an unsolicited resume.

