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Senior ASIC Engineer at Jane Street | London

Jane StreetLondon, England, United Kingdom
On-site Full-time

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Experience Level

Experience

Qualifications

About YouHands-on experience in RTL design and verification. Proficient in ASIC design utilizing either Synopsys or Cadence methodologies, with expertise in at least one of the following areas:Front-end RTL design and synthesis. Back-end physical design. Verification (including formal methods). Passionate about applying software engineering techniques to enhance the hardware design workflow, with experience in high-level programming languages such as Python, C++, Java, or Haskell. Fluent in English.

About the job

About the Position

Jane Street is seeking a talented and experienced ASIC Engineer to join our Ultra Low Latency team, where you will play a pivotal role in designing, testing, and deploying cutting-edge hardware solutions. In this collaborative environment, you will work closely with various teams across the firm, including trading, networking, and research infrastructure. We value versatility and are looking for someone comfortable with both FPGA and ASIC technologies.

We believe in the transformative power of tools to enhance productivity, reliability, and enjoyment in hardware engineering. That's why we developed Hardcaml, a hardware development toolchain integrated with OCaml. While prior knowledge of OCaml is not a prerequisite (we will provide training), we seek hardware engineers who are enthusiastic about leveraging superior tools and are open to exploring innovative approaches.

About Jane Street

At Jane Street, we are a global trading firm that leverages technology and quantitative research to drive our investment decisions. Our commitment to innovation and excellence is reflected in our dynamic work culture and collaborative spirit.

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