Principal Software Engineer

At d-Matrix, we are pioneering the potential of generative AI to revolutionize technology. Positioned at the leading edge of software and hardware innovation, we are dedicated to pushing the limits of what is achievable. Our workplace culture is built on mutual respect and collaboration.We embrace humility and value direct communication. Our team is diverse and inclusive, allowing for a variety of perspectives that lead to superior solutions. We are looking for individuals who are eager to take on challenges and are motivated by results. Are you ready to discover your playground? Together, we can explore the infinite possibilities of AI.This position requires you to work on-site at our Santa Clara, CA headquarters for three days a week in a Hybrid work model.Role Overview: Principal Architect - Performance Analysis and Modelingd-Matrix is searching for exceptional computer architects to enhance AI application performance at the convergence of hardware and software, with a keen focus on cutting-edge hardware technologies (such as DIMC, D2D, 3D-DRAM, etc.) and innovative workloads (like generative inference, etc.). Our acceleration philosophy spans the entire system, encompassing efficient tensor cores, storage, and data movements, along with co-designing dataflow and collective communication techniques.Key Responsibilities:Analyze the latest machine learning workloads (including multi-modal LLMs, CoT reasoning models, and video/audio generation).Contribute to the Hardware and Software features that empower the next generation of inference accelerators in data centers.Stay current with research in ML Architecture and Algorithms, collaborating with various partner teams including Product, Hardware Design, Compiler, Inference Server, and Kernels.Daily tasks will involve (1) analyzing the properties of emerging machine learning algorithms and workloads to discern functional and performance implications, (2) creating analytical models to forecast performance across current and future generations of d-Matrix hardware, and (3) proposing new hardware/software features to facilitate or accelerate these algorithms.Qualifications:Minimum:Bachelor's degree in Electrical Engineering or related field with over 10 years of industry experience, or a Master's degree preferred with at least 8 years of experience.Comprehensive understanding of relevant areas through academic or industry experience, including computer architecture, hardware-software co-design, and performance analysis.

We are seeking a Senior Performance Architect to join our dynamic team at Mindlance. In this pivotal role, you will leverage your expertise to design and implement high-performance systems that meet the demands of our clients. You will work closely with cross-functional teams to optimize performance metrics and ensure the scalability and reliability of our software applications.

Senior CPU Performance ArchitectLocation: Santa Clara, CAContract Duration: 12+ MonthsJob Overview:We are actively seeking a talented and experienced CPU Performance Engineer to join our dynamic team. In this role, you will be instrumental in defining and implementing the performance model for our client's next-generation high-end ARM microprocessor. Your contributions will span various phases of the development cycle, depending on your specific skills and project assignments. You will engage in a multitude of technical areas, including but not limited to:(1) Conducting feasibility studies, cost and power estimations, performance projections, and competitive analysis(2) Analyzing workloads(3) Performance and functional modeling, along with software benchmarking(4) Evaluating CPU and memory subsystem performance(5) Establishing performance correlations(6) Collaborating closely with CPU Design teams on defining next-generation micro-architecture.

At d-Matrix, we are on a mission to harness the power of generative AI and revolutionize technology. We stand at the cutting edge of software and hardware innovation, continuously exploring new frontiers of possibility. Our culture thrives on respect and collaboration.We embrace humility and prioritize direct communication. Our inclusive team values diverse perspectives, fostering enhanced problem-solving. We are in search of passionate individuals eager to tackle challenges and driven by results. Are you ready to explore your potential? Together, we can redefine the limitless opportunities of AI.Work Location:This is a hybrid position, requiring onsite work at our Santa Clara, CA headquarters 3-5 days per week.Key Responsibilities:• You will lead pre-silicon power estimation for design blocks, encompassing both RTL and physical design power assessments.• Collaborate with front-end and DV engineers to pinpoint power activity windows in designs, ensuring that feedback from estimations is effectively implemented to optimize power.• Develop an architectural power estimation tool tailored for AI workloads, calculating power based on system configuration and die-level metrics, including workload profiling with respect to memory size, bandwidth, and gate counts of compute/memory blocks.• Work alongside frontend architects and backend designers to compile necessary performance monitoring capabilities, system requirements, and usage analysis, contributing to hardware enhancements and die modifications.• Integrate analysis feedback into design processes with the frontend team.• Design micro-architecture and RTL, perform synthesis, and verify logic and physical power performance using state-of-the-art CAD tools and semiconductor technologies.• Design and implement performance enhancement and power-saving/monitoring functions that facilitate efficient design, testing, and debugging, participating in silicon bring-up and validation.Qualifications:• Master's degree in Electrical Engineering, Computer Engineering, or Computer Science with 10-15 years of relevant industry experience or equivalent.• Strong understanding of power, performance, micro-architecture, RTL, and physical design, with a focus on digital systems and IC design.

Join d-Matrix, where we are dedicated to harnessing the power of generative AI to revolutionize technology. As pioneers in software and hardware innovation, we continuously expand the limits of what is achievable. Our organizational culture promotes respect and collaboration, fostering an environment where everyone’s contributions are valued.We uphold humility and encourage open communication. Our inclusive team thrives on diverse perspectives, leading to superior solutions. We invite individuals who are passionate about overcoming challenges and are results-driven. Are you ready to explore your potential? Together, we can unlock the infinite possibilities of AI.Location: Hybrid (Santa Clara, CA) or RemoteRole Overview: Principal AI Security Architectd-Matrix is on the lookout for an exceptional security architect to integrate robust secure computing principles into our high-performance AI accelerator systems, designed to meet or exceed the needs of our datacenter clients. Adopting a holistic approach to security, we embed security features across the entire stack—from silicon to application level—to ensure that our customers' workloads operate in a reliable and secure environment, regardless of deployment scale.Key Responsibilities:Contribute to the design of hardware and software security features that will enhance our next-generation inference accelerators.Stay updated on the latest research in machine learning, architecture, and security, collaborating with cross-functional teams including design, verification, and software.Gather and analyze customer security requirements to define threat models and mitigation features for our computing systems, working alongside engineering teams to integrate these at the appropriate design levels.Qualifications:A Master’s degree in Electrical Engineering (MSEE) with 15+ years of relevant experience, or a PhD with 10+ years of applicable experience.Demonstrated expertise in multiple relevant domains, including computer architecture, secure computing, distributed systems, and datacenter reliability/manageability.Practical experience with authentication, isolation, encryption, and device signing.

At d-Matrix, we are dedicated to unlocking the potential of generative AI, driving the transformation of technology. Our commitment to innovation in both software and hardware positions us at the forefront of industry advancements. We foster a culture of respect and collaboration, where humility, direct communication, and inclusivity are core values.We are in search of passionate individuals who are eager to embrace challenges and are motivated by effective execution. Are you ready to join us in exploring the vast possibilities of AI? Together, we can redefine the future!Location:This is a hybrid role, requiring on-site work at our Santa Clara, CA headquarters 3-5 days per week.Key Responsibilities:• Lead the micro-architecture and design of AI Control subsystem modules, including Hardware Execution Engines.• Take ownership of design documentation, execution, and delivery of high-performance, area-efficient, and power-efficient RTL meeting design targets and specifications.• Design micro-architecture and RTL, perform synthesis, and conduct logic and timing verification using cutting-edge CAD tools and semiconductor technologies.• Develop and implement logic functions that facilitate efficient testing and debugging.• Participate in silicon bring-up and validation for owned blocks.

Join d-Matrix, where we are dedicated to harnessing the power of generative AI to revolutionize technology. At the forefront of software and hardware innovation, we continuously push the limits of what is achievable. Our culture fosters respect and collaboration, emphasizing humility and direct communication.We pride ourselves on being an inclusive team, where diverse perspectives lead to innovative solutions. We are on the lookout for individuals who are passionate about overcoming challenges and are driven by results. Are you ready to explore the playground of possibilities with us? Together, we can redefine the future of AI.Location: Hybrid, with three days a week onsite at our headquarters in Santa Clara, CA.The Role: Principal Digital Design Engineer, Micro-ArchitectWhat You'll Do:You will play a crucial role in the micro-architecture and design of AI sub-system modules, including SIMD and Hardware Execution Engines. In collaboration with System Architects, you will define and implement a Custom ISA while developing an efficient C-Kernel. Your responsibilities will include owning the design, documentation, execution, and delivery of fully verified, high-performance, area, and power-efficient RTL to meet design targets. Additionally, you will engage in the design of micro-architecture and RTL, synthesis, and logic and timing verification using cutting-edge CAD tools and semiconductor process technologies. You will also implement logic functions for efficient testing and debugging and actively participate in the silicon bring-up and validation of your assigned blocks.Key Responsibilities:Lead the micro-architecture and design of AI Compute sub-system modules, including Hardware Execution Engines.Own the design, documentation, execution, and delivery of fully verified, high-performance, area, and power-efficient RTL to achieve design targets.Design micro-architecture and RTL, synthesis, logic, and timing verification using leading-edge CAD tools and semiconductor technologies.Design and implement logic functions that facilitate effective testing and debugging.Engage in silicon bring-up and validation for the blocks you own.Qualifications:Master's degree in Electrical Engineering, Computer Engineering, or Computer Science with 12+ years of relevant experience.Extensive knowledge of micro-architecture design and RTL development.Proficiency in using advanced CAD tools for synthesis and verification.Demonstrated ability in silicon validation and debugging methodologies.Strong communication skills and the ability to work collaboratively in a team environment.

Join our dynamic team at Mindlance as a CPU Performance Engineer. In this pivotal role, you will be responsible for optimizing CPU performance to ensure our products deliver unparalleled efficiency and speed. Your expertise will play a crucial part in driving innovations that shape our technology landscape.

Join Integrated Resources Inc. as a Principal Engineer and be an integral part of our innovative team. In this role, you will lead engineering projects, mentor junior engineers, and drive technical excellence within our organization. Your expertise will be crucial in developing cutting-edge solutions that meet the needs of our clients.

We appreciate your interest in joining Oklo! We are on the lookout for a dedicated Fuel Performance Engineer to enhance our team. Position Overview As a Fuel Performance Engineer at Oklo, you will play a crucial role in conducting fuel performance analyses and validating both current and future fuel designs for our Aurora powerhouses. Your responsibilities will encompass engineering analyses, modeling and simulation, comprehensive documentation of your findings, and collaboration with our reactor design, fuel fabrication, and licensing teams. Key Responsibilities: Evaluate the performance of existing and innovative fuel designs under anticipated operating conditions and potential off-normal scenarios. Develop analytical methodologies to build confidence in fuel design, which may include creating software for modeling and simulation purposes. Conduct verification and validation of modeling and simulation tools to support your analyses. Assist in experimental fuel campaigns. Work collaboratively across teams to provide insightful technical feedback to design initiatives. Utilize modern documentation tools and techniques to produce clear and concise technical reports. Desired Competencies: We seek a Fuel Performance Engineer who is: Passionate about advancing clean energy and making advanced fission technology a reality. Quick to learn and adaptable to changing challenges. Excited to collaborate in a dynamic team environment, receptive to constructive feedback, and eager to grow. Comfortable in a fast-paced startup culture that encourages innovative thinking and novel approaches. Creative and analytical in addressing engineering challenges. Proactive in proposing innovative solutions to complex technical issues. Minimum Qualifications: Bachelor's degree in engineering with a minimum of 3 years of relevant experience. Demonstrated expertise in multi-physics system performance analyses. Proficient in finite element simulation software (e.g., Ansys, Abaqus). Experience with material analysis techniques. Knowledge of an object-oriented programming language (e.g., Python, C++). Preferred Qualifications: Experience in nuclear fuel performance analysis. Familiarity with metallic fuels. Background in fuel analysis and performance evaluation.

AI/ML Architect Job Description Join our innovative team at Klearnow as an AI/ML Architect, where you'll play a pivotal role in defining our AI strategies and technical frameworks. Collaborate with a talented group of data scientists, engineers, and product managers to create cutting-edge AI solutions that address client needs and drive our company forward. Key Responsibilities AI Strategy and Solution Design · Work alongside clients and internal teams to comprehend their business goals and challenges, transforming them into AI-centric strategies and solutions.· Spearhead the design and architecture of comprehensive AI systems, overseeing data collection, preprocessing, feature engineering, model selection, training, and deployment.· Remain updated on the latest advancements in AI and machine learning to ensure our solutions are at the forefront of technology. Technical Leadership· Provide technical guidance to our AI development team, including data scientists, machine learning engineers, and software developers.· Lead by example, promoting best practices in AI development to ensure the quality, scalability, and maintainability of AI systems.· Cultivate a culture of innovation, continuous learning, and knowledge sharing within the AI team. Model Development and Evaluation· Oversee the development and assessment of machine learning models to guarantee they meet the highest standards of accuracy and performance.· Implement rigorous testing and validation procedures to detect and resolve potential issues early in the development process. Infrastructure and Deployment · Collaborate with our DevOps and IT teams to design and sustain scalable AI infrastructure for efficient model training, testing, and deployment.

Join d-Matrix, where we harness the power of generative AI to revolutionize technology. As pioneers in both software and hardware, we strive to redefine possibilities. Our workplace thrives on mutual respect and collaboration, creating an environment where every voice matters.At d-Matrix, we foster a culture of humility and open communication. Our inclusive team embraces diverse perspectives to drive innovative solutions. We are looking for passionate individuals eager to confront challenges and execute ideas effectively. Are you ready to explore endless possibilities in AI with us?Location:This is a hybrid role, requiring on-site work at our Santa Clara office three days a week. The internship spans 12 weeks, beginning June 1st and ending August 21st, or from June 22nd to September 11th.The TeamOur Simulation and Modeling team at D-Matrix develops a Virtual Platform that facilitates early software development in the product life cycle. This platform features:Bit-accurate functional reference modelsCycle-approximate simulationsDetailed cycle-accurate simulationsConstructed using C++ and Python, our platform utilizes generators and run-time configurations to handle large-scale simulations, supporting distributed workloads.The RoleIn this role, you will assist in the development of functional reference models and performance simulators that enable early software development and architectural exploration. Your responsibilities include:Interpreting hardware specifications and aiding in the creation of algorithmic or transactional models reflecting hardware behavior.Collaborating with senior engineers, architects, and hardware designers to clarify documentation and resolve issues.Contributing to the modeling infrastructure under the mentorship of seasoned team members.Engaging in model bring-up, testing, and correlation tasks.Supporting debugging across various workloads and architectural scenarios.

At Tenstorrent, we are at the forefront of pioneering AI technology, setting new benchmarks for performance, usability, and cost-effectiveness. As AI transforms the computing landscape, it is crucial for solutions to evolve, integrating advancements in software models, compilers, platforms, networking, and semiconductors. Our passionate and diverse team of technologists has successfully designed a high-performance RISC-V CPU from the ground up, driven by a shared commitment to AI excellence and the ambition to create the ultimate AI platform. We value collaboration, curiosity, and a relentless pursuit of challenging problems. We are expanding our team and seeking contributors across all experience levels.As a C++ Machine Learning Engineer on our AI Models team at Tenstorrent, you will play a vital role in developing the training framework for our most sophisticated models. Your responsibilities will involve writing high-performance C++ code, designing new layers and operators, and ensuring our models efficiently scale across our custom silicon. If you have a passion for building the core of machine learning systems and optimizing their performance, this opportunity is tailored for you.This position is hybrid, based out of Santa Clara, CA.We encourage candidates with varying levels of experience to apply. During the interview process, we will evaluate candidates to determine the most suitable level, and offers will correspond to that level, which may differ from what is stated in this posting.

Join plus-2 as a Principal Engineer / Director of Motion Planning, where you will lead the development of cutting-edge motion planning technologies that drive our innovative projects. You will work closely with a talented team of engineers and researchers to create advanced algorithms and systems that enhance autonomy in robotics and automation.This role offers an exciting opportunity to shape the future of motion planning and contribute to high-impact projects. You will leverage your expertise to mentor junior engineers, collaborate with cross-functional teams, and drive research initiatives that align with our strategic goals.

Join us at the forefront of technology as we revolutionize the data storage industry. At Pure Storage, you will be part of a visionary team that embraces innovative thinking and collaboration, shaping the future of enterprise storage.If you are passionate about making a significant impact in the tech world, we invite you to become part of our journey.THE ROLEWe are seeking a talented Performance Benchmarking Program Manager to spearhead and expand our benchmarking initiatives. In this role, you will drive competitive advantages by leading the development and delivery of formal benchmarks across various enterprise storage domains including File/NAS, HPC, AI/ML, and Block. You will serve as the strategic liaison between engineering, product, and our global marketing teams, ensuring that our benchmarks are timely, defensible, standards-compliant, and translate into actionable insights and compelling marketing narratives.WHAT YOU'LL DODesign and implement a global benchmark strategy along with a submission calendar (e.g., SPECstorage, IO500, MLPerf) to align seamlessly with product launch schedules and competitive objectives.Lead and scale domain-specific teams (e.g., File/NAS, HPC, ML/MLPerf) to enforce engineering best practices and a standardized approach to benchmark execution and data analysis.Drive organizational impact by collaborating with Platform Engineering and Product leaders to secure necessary tuning and optimizations for achieving top-tier public benchmark results.Oversee compliance, governance, and public communications by facilitating go/no-go reviews with Legal and Brand teams regarding external performance claims, ensuring traceable evidence and appropriate trademark usage.Transform technical results into market value by working closely with Technical Marketing to convert benchmark data and insights into engaging external content, whitepapers, and sales enablement materials.As our team primarily operates from the office, you will be expected to work from our Santa Clara location, adhering to Pure's policies, except during PTO, work travel, or other approved leave.

Join eproinc as a MicroStrategy Architect and leverage your expertise in data analytics and business intelligence solutions. Your role will involve designing and implementing MicroStrategy environments, ensuring optimal performance and scalability. Collaborate with cross-functional teams to translate business requirements into technical solutions and drive data-driven decision-making across the organization.

Job Title: Repair and Failure Analysis Technician Location: Santa Clara, CA 95054 Duration: Long Term Contract Pay Rate: $25-$28/hr on W2 without benefits.Roles and Responsibilities:Conduct repair, testing, and failure analysis of electro-mechanical assemblies and Field Replaceable Units (FRUs).Interpret wiring diagrams, schematics, assembly drawings, and engineering documents effectively.Document quality issues and repair transactions in SAP/Agile systems to ensure product traceability.Perform functional testing, inspection, and calibration to uphold product quality and craftsmanship standards.Assist with root cause investigations and troubleshooting of component-level failures.Set up and operate repair equipment, fixtures, and testing machines.Maintain accurate documentation and adhere to SOPs, safety protocols, and regulatory standards.Communicate repair status with engineering, quality assurance, and supervisory staff.Ensure a clean and organized work environment while supporting continuous improvement initiatives.Key Qualifications:Basic proficiency in English, math, and logical reasoning.Experience with Microsoft Office, SAP ERP, and QMS systems (Agile).Ability to function in a production/repair environment, lifting up to 50 lbs and performing repetitive tasks.Strong attention to detail, teamwork, and communication skills are essential.A technical diploma, associate degree, or equivalent technician training is preferred.

Join CyberArk as an Accelerator Architect where you will play a pivotal role in shaping the future of our security solutions. In this role, you will leverage your expertise to design, implement, and optimize cutting-edge architectures that empower our clients to protect their critical assets effectively. Your innovative thinking and technical acumen will be crucial in driving our product development and enhancing our overall security posture.

Join PlusAI, a trailblazer in Physical AI, as we develop cutting-edge AI-driven virtual driver software for autonomous trucks. With our headquarters positioned in the heart of Silicon Valley and operations extending across the United States and Europe, PlusAI has been recognized by Fast Company as one of the World’s Most Innovative Companies. We collaborate with industry leaders such as TRATON GROUP’s Scania, MAN, International brands, Hyundai Motor Company, Iveco Group, Bosch, and DSV to accelerate the rollout of next-generation autonomous trucking solutions. If you're passionate about making a significant impact and steering the future of autonomy, we invite you to become part of our dynamic team.As a Principal Engineer on our Mapping and Localization team, you will be responsible for the design and implementation of sophisticated fusion algorithms that integrate data from LiDAR, Radar, Cameras, IMUs, and GNSS with HD Maps to achieve unparalleled centimeter-level accuracy. Your expertise will be crucial in addressing the most challenging scenarios—from navigating GPS-denied tunnels to maneuvering through dynamic construction zones—ensuring our vehicles can operate safely and effectively within complex Level 4 Operational Design Domains (ODDs).