About the job
As the Principal Engineer in Systems Design Engineering, you will be responsible for the comprehensive PCIe system architecture for our NVMe SSD product range, catering to both client laptops and enterprise servers. Your expertise will guide the entire process from PHY/MAC evaluation to ASIC/SoC integration, including PCIe SFR/register analysis and the establishment of firmware design guidelines for effective link training, transitions, and low-power operation. This role uniquely positions you at the crossroads of PCIe specification adherence, NVMe functionality, firmware structure, platform compatibility, and power/performance optimization.
Key Responsibilities
- Lead the system-level architecture for PCIe Gen5/Gen6 from the perspective of NVMe SSD endpoints.
- Establish and review the integration of PCIe and NVMe across SSD products.
- Conduct PHY and MAC IP evaluations, defining integration requirements and constraints.
- Oversee SoC/ASIC integration aspects, including clocks, resets, power domains, straps, lane mapping, and sideband signals.
- Develop PCIe SFR and firmware guidelines, focusing on flow control, LTSSM observability, power states, and error management.
- Manage link and low-power transitions, including DLRM, L1, L1SS, L0p, ASPM, clock-down, and APST coordination.
- Facilitate system bring-up and debugging processes, addressing enumeration, speed negotiation, width detection, and AER/error recovery.
- Align SSD performance with customer requirements, focusing on latency, power efficiency, and reliability.
- Provide advanced knowledge in PCIe configurations and extended capability registers, including link management, power optimization, and error reporting.
- Lead cross-team collaboration for platform bring-up and debugging, ensuring effective enumeration, link training, and error handling.
- Act as the technical authority for escalations from both internal teams and external customers.
