Qualifications
Key Responsibilities:Lead innovative physical design initiatives aimed at achieving optimal PPA for Syntiant's upcoming ASICs. Implement the complete RTL to GDSII physical design flow, including synthesis, pad ring, floor planning, placement, clock tree synthesis, detailed routing, and optimization, culminating in physical signoff verification. Collaborate with the Physical Verification Team to rectify layout violations. Coordinate with the foundry to finalize tape-out documentation and checks. Required Qualifications, Education, and Experience:Master's or PhD in Electronics Engineering with 5+ years of experience in physical design and implementation. Proficiency in the entire RTL to GDSII design flow, utilizing industry-standard EDA tools for physical design and timing signoff, with a focus on enhancing PPA (Performance, Power, Area). In-depth knowledge of industry standards and practices related to physical design, including physically aware synthesis, floor planning, place & route, metal fill, chip finishing, signal integrity checks, and static/dynamic EMIR-Drop analysis. Experience in developing chip floor plans, including power grid and partitioning. Familiarity with signoff ECO flow to resolve timing, noise, IR-Drop, and EMIR violations. Skilled in physical design verification to troubleshoot and resolve LVS/DRC/PERC issues at both chip and block levels using industry-standard tools. Understanding of UPF flow. Experience with foundry communication related to tape-out processes. Knowledge of package and RDL routing design. Proficiency in programming/scripting languages such as Python, Perl, or Tcl. Experience with scan insertion and ATPG pattern generation is advantageous. Familiarity with power analysis flows is a plus.
About the job
Summary Description:
Syntiant Corp. is at the forefront of innovation in the rapidly evolving field of AI software and semiconductor solutions. We are seeking a skilled and driven Physical Design Engineer to play a pivotal role in advancing our Hardware Engineering capabilities within our dynamic team.
As a Physical Design Engineer, you will significantly contribute to our ASIC R&D efforts. This is a unique opportunity to influence the entire physical design process, from RTL to GDSII, ensuring top-tier PPA for our upcoming Syntiant ASICs while collaborating across various functional teams.
About Syntiant Corp.
Founded in 2017 and headquartered in Irvine, California, Syntiant Corp. is a pioneering company dedicated to delivering cutting-edge hardware and software solutions that drive advancements in artificial intelligence technology. We pride ourselves on our innovative approach and commitment to excellence.