IC Package FEA Engineer

About EtchedEtched is pioneering the development of the world's first AI inference system specifically designed for transformer models, achieving over 10x the performance and significantly lower costs and latency compared to traditional methods like B200. With our proprietary ASICs, you can create revolutionary products, such as real-time video generation models and highly sophisticated reasoning agents. Supported by substantial investments from top-tier investors and driven by a team of leading engineers, Etched is transforming the infrastructure for the fastest-growing industry of our time.Job OverviewWe are looking for a talented Substrate IC Package Layout Design Engineer to join our dynamic team. In this role, you will oversee the complete design process of intricate IC substrate packages, catering to high-power consumption and high-speed signaling requirements. The ideal candidate will bring substantial experience in large substrate designs (>50mm), complex power delivery networks, and high-speed signaling solutions (up to and exceeding 50GHz). You will collaborate closely with silicon, signal integrity, power integrity, and system engineering teams to co-design state-of-the-art substrates with OSAT providers, with a strong emphasis on optimizing power delivery through substrate technology.Key ResponsibilitiesLead the design and development of sophisticated IC substrate layouts for high-performance AI processors and accelerators.Design complex multi-layer substrate packages (>50mm) with high pin counts and intricate routing requirements.Ensure robust power delivery designs capable of supporting custom silicon solutions exceeding 700W.Develop high-speed signal routing solutions that facilitate >50GHz signaling while minimizing issues such as loss and crosstalk.Work alongside SI/PI engineers to determine signal integrity and power integrity requirements, implementing effective solutions within the substrate layout.Optimize CoWoS (Chip-on-Wafer-on-Substrate) designs for enhanced thermal and electrical performance.Collaborate with chip design, packaging, and manufacturing teams to ensure design feasibility and manufacturability.Conduct design validation and verification processes to ensure compliance with specifications.

Job Title: Advanced Package Design EngineerOffice Location: San Jose, CAWork Model: Onsite About SK hynix AmericaAt SK hynix America, we are leading the charge in semiconductor innovation, delivering cutting-edge memory solutions that drive the functionality of everything from smartphones to expansive data centers. As a global frontrunner in DRAM and NAND flash technologies, we are at the forefront of mobile technology evolution, enhancing cloud computing capabilities, and spearheading the development of future technologies. Our advanced memory technologies are pivotal in powering today’s most sophisticated electronic devices and IT infrastructures, ensuring superior performance and user experiences across the digital realm.We seek visionary thinkers to join our mission of redefining the technology landscape. At SK hynix America, you will collaborate with a team that is innovating groundbreaking memory solutions while upholding a strong commitment to sustainability. We are not merely adapting to technological advancements; we are the driving force behind them, with substantial investments in artificial intelligence, machine learning, and eco-conscious solutions and practices. As we continue to grow our market presence and push the limits of semiconductor technology, we invite you to be part of our journey in creating the next generation of memory solutions that will shape the future of computing.Job Summary:We are looking for a talented Advanced Package Design Engineer to become a part of our Packaging Engineering team at SK hynix America. In this role, you will be tasked with designing and optimizing high-performance, high-density interposers for chiplet-based architectures and heterogeneous integration solutions. You will work closely with PCB, SI/PI, thermal, and manufacturing teams to deliver robust, manufacturable, and cost-effective packaging solutions.Responsibilities:Design silicon and organic interposers for advanced packaging solutions.Utilize EDA tools such as Virtuoso/APD, Synopsys Custom Compiler, and Siemens Xpedition to create and verify advanced package layouts.Conduct design studies and 'what-if' scenario analyses for advanced packaging schemes to optimize overall package design.Create and maintain layout design rules, stack-ups, and layout guidelines.Collaborate with internal and external stakeholders to ensure seamless development of advanced packaging technologies.

Axiado Corporation is on the lookout for a talented Senior IC Packaging Engineer to spearhead technical leadership and architectural ownership of cutting-edge IC and System-in-Package (SiP) solutions in a dynamic startup atmosphere. This position is tailored for an experienced technologist who merges extensive hands-on expertise with a comprehensive system-level perspective, thriving in ambiguous and impactful environments.In this role, you will define and implement high-performance, low-power packaging architectures that encompass 2D and RDL-based fan-out (2.5D) and chiplet-based designs, driving efforts from initial technology exploration through to production ramp-up. Collaborating closely with foundries, OSATs, substrate suppliers, and internal cross-functional teams, you will influence product execution and long-term packaging strategies.Key ResponsibilitiesAct as the technical authority for IC and SiP packaging across various products and programs.Own the package architecture and technology roadmap, ensuring alignment with product, cost, and scalability objectives.Lead the development of chiplet-based packaging strategies, including UCIe, silicon interposers, and advanced RDL.Guide hands-on package design and physical layout, focusing on critical structures for High-speed SerDes/PHY (PCIe, CXL), LPDDR5, UCIe, and other multi-gigabit interfaces.Define substrate stack-ups, materials, bump/RDL architectures, and Design-for-Manufacturing (DFM) guidelines for advanced nodes.Drive signal integrity (SI), power integrity (PI), thermal, mechanical, and reliability trade-offs at the system and package levels.Engage externally with OSATs, foundries, and key suppliers to facilitate technology development and manufacturing readiness.Influence product roadmaps, risk management, and investment decisions through technical insights.Establish scalable design methodologies, best practices, and reusable packaging flows.

Join Lumilens as a Principal Engineer in Advanced Package Technology and take the lead in shaping innovative solutions in the field of advanced packaging. In this pivotal role, you will leverage your extensive expertise to drive the development and implementation of cutting-edge package technologies. Collaborate with cross-functional teams to enhance product performance and reliability, while ensuring compliance with industry standards.

Etched seeks a PCB Layout Engineer to design and develop printed circuit boards for its products. This position is based in San Jose, Taiwan. Key Responsibilities Collaborate with teams from different disciplines to translate detailed specifications into functional PCB layouts. Verify that each board aligns with established quality and efficiency standards. Role Focus This role centers on creating reliable and effective printed circuit boards that support Etched's product goals. Daily work involves both technical design and close teamwork with colleagues from various backgrounds.

Role overview The Power Systems Design Engineer at Etched will design, analyze, and refine power systems to meet demanding performance and reliability standards. This position requires working closely with colleagues from multiple teams to create solutions that align with client requirements. What you will do Design and analyze power systems for both new initiatives and ongoing projects Apply engineering best practices to enhance system performance and reliability Collaborate with cross-functional teams to develop and implement tailored solutions Location This role is based in San Jose.

About EtchedEtched is pioneering the development of an AI inference system specifically designed for transformers, achieving over ten times the performance and significantly reduced cost and latency compared to traditional systems. Our innovative ASICs enable the creation of products previously thought impossible, such as real-time video generation models and advanced reasoning agents. Supported by substantial investment from top-tier investors and a team of leading engineers, Etched is at the forefront of transforming the infrastructure for the rapidly evolving tech industry.Job SummaryWe are on the lookout for a talented PCB Layout Engineer to join our vibrant team and play a vital role in the design and optimization of high-performance data center products. In this position, you will utilize Cadence Allegro PCB design tools to focus on high-speed signaling, particularly in 100G applications, power distribution, and the management of complex HDI PCB stack-ups. Your contributions will be essential in ensuring our products adhere to the highest standards of performance, reliability, and efficiency.Key ResponsibilitiesDrive the design and optimization of high-speed PCB layouts utilizing Cadence Allegro, focused on 100G signaling. Implement effective strategies for impedance matching, trace routing, and crosstalk mitigation, resulting in durable designs that fulfill the demanding performance criteria of contemporary data centers.Create and execute power distribution networks for advanced data center hardware. Develop power planes, decoupling strategies, and thermal management solutions that support high-performance systems, ensuring reliability and efficiency under substantial operational loads.Oversee the design of intricate High-Density Interconnect (HDI) PCB stack-ups for multi-layer boards. Integrate blind/buried vias and microvias to satisfy the advanced technical requirements of data center systems, enhancing signal integrity and achieving compact form factors.Collaborate closely with electrical and mechanical engineering teams to integrate PCB designs within the overall system architecture. Provide critical input during design reviews to optimize performance, ensure manufacturability, and align with overarching system-level goals in a data center context.You may be a great fit if youHold a Bachelor’s degree in Electrical Engineering or a related field.

Archer Aviation is a pioneering aerospace company headquartered in San Jose, California, focused on developing an all-electric vertical takeoff and landing (eVTOL) aircraft. Our mission is to revolutionize air mobility by providing sustainable transportation solutions that are not only efficient but also environmentally friendly, allowing for quiet and smooth journeys with a capacity for four passengers.We are committed to pushing the boundaries of technology and innovation, and we recognize that a diverse workforce enhances our problem-solving capabilities and fosters greater creativity. At Archer, we strive to build an inclusive workplace that values each individual's unique contributions and perspectives, empowering our team to achieve collective success.What You'll Do:Design and develop inlet and exhaust ducting systems for turboshaft engines and advanced thermal management systems on aircraft.Collaborate with aerothermal analysts to refine duct designs for optimal performance, pressure drop, and thermal efficiency.Take ownership of the design process from initial concept through to production, including requirements gathering, 3D CAD modeling, detailed drawings, bill of materials (BOM), and design verification.Engage with suppliers to oversee fabrication processes, ensuring adherence to design specifications and troubleshooting manufacturing challenges.Select and integrate commercial off-the-shelf (COTS) components such as bellows, flex joints, seals, and clamps as needed.Develop and execute verification testing strategies for ducting systems, supporting thorough qualification testing including pressure, temperature, and vibration assessments.Establish and nurture supplier relationships to lead procurement efforts effectively.Collaborate with Systems Engineering and aerothermal analysts to document and validate design requirements thoroughly.

Job Title: Senior AI Systems EngineerOffice Location: San Jose, CAJob Type: Full-TimeWork Model: OnsiteAbout SK hynix AmericaAt SK hynix America, we lead the charge in semiconductor innovation, creating state-of-the-art memory solutions that empower devices from smartphones to extensive data centers. As a global frontrunner in DRAM and NAND flash technologies, we are pivotal in the advancement of mobile technology, enhancing cloud computing, and pioneering future-ready innovations. Our cutting-edge memory solutions are indispensable to the most sophisticated electronic devices and IT infrastructures, delivering improved performance and user experiences across the digital ecosystem.We seek visionary professionals to join us in our mission to shape the future of technology. At SK hynix America, you'll collaborate with a team that is at the forefront of revolutionary memory solutions while upholding a strong commitment to sustainability. We are not merely adapting to technological changes; we are driving them forward, evidenced by our significant investments in artificial intelligence, machine learning, and environmentally-friendly practices. Join us on our journey to develop the next generation of memory solutions that will redefine the future of computing.

About Archer Aviation Archer Aviation is developing all-electric vertical takeoff and landing aircraft to advance sustainable air mobility. The company’s aircraft is designed to carry four passengers, with a focus on reducing noise and supporting environmental goals. Archer values a diverse and inclusive workplace, encouraging collaboration and recognizing the unique contributions of each team member. Role Overview The Mechanical Design Engineer - Turboshaft Systems will support the design and development of a new Turbogenerator system. This role is based in San Jose, California. Main Responsibilities Create detailed models of components and large assemblies for the Turbogenerator using Siemens NX. Develop master geometry and skeleton models. Design components with manufacturability and assembly in mind. Produce accurate 2D manufacturing drawings. Apply geometric dimensioning and tolerancing standards. Oversee the design process, working closely with manufacturing and testing teams. Maintain bills of materials, test protocols, and design guidelines. Present design concepts clearly to stakeholders. Work collaboratively with supply chain, quality assurance, manufacturing, and engineering teams.

About Archer Aviation Archer Aviation, based in San Jose, California, develops all-electric vertical takeoff and landing (eVTOL) aircraft. The company focuses on sustainable air mobility, designing aircraft that can carry four passengers while minimizing noise. Archer values creative problem-solving and believes that a diverse, inclusive workplace leads to stronger results and a more supportive team environment. Role Overview The Thermal Systems Design Engineer for Hybrid Powertrain will lead the design and development of advanced thermal systems for Archer’s hybrid aircraft. This role involves hands-on engineering, collaboration across disciplines, and responsibility for the system’s full lifecycle, from concept to implementation. Key Responsibilities Design, model, and implement innovative thermal systems for hybrid aircraft. Select technologies and materials suited for complex thermal management challenges. Ensure thermal systems are lightweight, efficient, and cost-effective. Validate performance through rigorous testing and system definition. Work closely with stakeholders to deliver a comprehensive thermal solution. Oversee the thermal system’s lifecycle, coordinating with manufacturing and testing teams. Present design concepts and project updates to stakeholders. Collaborate with supply chain, quality assurance, manufacturing, and stress/FEA engineers.

About LumilensAt Lumilens, we are pioneering the foundational photonics infrastructure that will drive the next generation of AI supercomputing. Our innovations, ranging from chip-to-chip optical interconnects to scalable photonic engines, are set to usher in an era of computing that is faster, cooler, and significantly more efficient.As a well-funded startup supported by Mayfield and led by industry veterans, we are not just making incremental advancements; we are embarking on a transformative journey to revolutionize the optical layer from the silicon up. You'll be part of a team comprised of world-class engineers tackling some of the toughest challenges in optics, systems, and scalability. Every line of code, every design decision, and every breakthrough you contribute will play a crucial role in shaping the future infrastructure.If you seek a mission-driven environment with momentum and the opportunity to make a significant impact, come join our exciting journey. We’re just getting started.

Astera Labs designs connectivity solutions for AI infrastructure, partnering with hyperscalers and ecosystem leaders to support modern data systems. The company’s Intelligent Connectivity Platform integrates technologies such as CXL®, Ethernet, NVLink, PCIe®, and UALink™ with the COSMOS software suite, supporting both standard and custom architectures. Role overview This Analog/Mixed-Signal Design Engineer position is for a new graduate, starting in 2026 and based in San Jose, CA. The focus is on designing advanced node CMOS products for high-performance connectivity applications. What you will do Design and verify analog and mixed-signal circuits, including Phase-Locked Loops (PLLs), Delay-Locked Loops (DLLs), Analog-to-Digital Converters (ADCs), voltage regulators, amplifiers, transmitters (TX), receivers (RX), and Clock Data Recovery (CDR) circuits. Develop analog and clocking blocks for connectivity solutions. Use industry-standard tools such as Spectre and MATLAB for design and verification. Requirements New graduate with a strong interest in analog and mixed-signal IC design for connectivity applications. Motivated to work on advanced node CMOS products. Ready to contribute to a collaborative team. Learn more about Astera Labs at www.asteralabs.com.

Join Our Team as a Research EngineerAt Physical Superintelligence, a pioneering startup with affiliations to esteemed institutions like Google, Harvard, Meta, MIT, Oxford, Johns Hopkins, Cambridge, and the Perimeter Institute, we are on a mission to revolutionize the discovery of new physics through advanced AI systems. We are currently seeking talented engineers to develop a robust platform that lies at the intersection of computational science, artificial intelligence, and software engineering.Our Vision: We aim to unlock transformative breakthroughs in physics at scale with the help of artificial superintelligence, ensuring safety and verifiability for the benefit of the public. Following a century that produced groundbreaking innovations like transistors, lasers, and nuclear energy, we believe that artificial superintelligence will herald a new golden age of scientific discovery.Our Focus: We are dedicated to creating a comprehensive infrastructure that will enable the industrialization of scientific discovery, allowing us to bring forth the next era of physics.

About OKX OKX stands as a regulated cryptocurrency exchange and self-custody wallet provider, serving millions worldwide. The platform supports a growing ecosystem of decentralized applications, with new features regularly introduced across trading, DeFi, payments, and social products. Each launch brings fresh design challenges and opportunities to shape user experience. The design team at OKX is evolving, with a focus on raising the bar for craftsmanship, strengthening brand consistency, and weaving AI into daily workflows. The team operates with clear values: We Before Me, Do the Right Thing, and Get Things Done. These principles guide hiring, development, and project execution. Role Overview: Design Director of Visual Systems OKX is hiring a Design Director of Visual Systems to lead the creation and evolution of its visual language. This leader will ensure creative quality and consistent brand expression across every product experience. The goal: build and scale a visual system that clearly communicates OKX’s brand intent to users. Key Focus Areas Develop and refine the visual framework that defines the brand’s look and feel. Drive creative excellence and maintain brand consistency across all touchpoints. Collaborate closely with both Brand and Product Design teams, strengthening the connection between these groups through a unified visual infrastructure. Foster a culture of collaboration and innovation within the design organization. Location This position is based in San Jose, California, United States.

About UsAt chipstack, we are revolutionizing the way chips are designed in an era where the complexity and demands of technology are constantly evolving. Our team combines expertise from top-tier companies such as Qualcomm, Nvidia, Google, and Meta, and we are passionate about integrating artificial intelligence into the Electronic Design Automation (EDA) landscape.Backed by leading investors like Khosla Ventures and Cerberus, we are already working with over 10 pioneering customers, ranging from Fortune 100 companies to innovative AI silicon startups. Join us as we drive the future of chip design.Position OverviewWe are on the lookout for a motivated Functional Verification Engineer with a strong background in UVM test bench development. Your role will be pivotal in harnessing AI to transform traditional verification methodologies, ensuring the design and validation of cutting-edge semiconductor technologies. Collaborating with a talented team of machine learning and software engineers, you will utilize advanced AI tools to innovate our verification processes.Key Responsibilities• Drive the application of machine learning to enhance pre-silicon functional verification methodologies including UVM.• Utilize AI-powered EDA tools to streamline design and verification workflows.• Identify challenges within UVM verification and implement AI-driven solutions.• Collaborate with customers to understand their needs and provide groundbreaking verification strategies.• Work closely with machine learning and software engineering teams to ensure high-quality outputs.• Stay updated on the latest advancements in AI-powered hardware verification and contribute to internal knowledge sharing.Required Qualifications• Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.• A minimum of 3 years of experience in digital design and verification, with a strong emphasis on UVM.

About EtchedAt Etched, we are at the forefront of innovation, developing the world’s first AI inference system that is meticulously designed for transformers. Our technology offers over 10x the performance of traditional systems like the B200, while significantly reducing costs and latency. With our advanced ASICs, we empower the creation of groundbreaking products, enabling real-time video generation and complex reasoning models that surpass the capabilities of GPU-based systems. Supported by substantial investments from prominent industry leaders and a team of top-tier engineers, Etched is reshaping the infrastructure of the fastest-growing sector in history.Job SummaryWe are seeking highly skilled Physical Design Engineers to join our dynamic team. In this pivotal role, you will take charge of block-level implementation and verification, spearhead timing closure and PPA optimization, oversee third-party design collaborations, and enhance our design workflows and iteration speed.Key ResponsibilitiesGain a comprehensive understanding of the physical design processExecute PD flows to achieve block closure, support ASIC infrastructure, automate PD processes, and refine CAD toolsCollaborate with RTL Designers to provide insightful Physical Design feedback aimed at enhancing PPADevelop and manage dashboards that track project convergence related to PDOptimize tool workflows by partnering with EDA vendors to adopt the latest featuresTake responsibility for achieving block-level closureOversee the outsourcing of physical design tasks to third-party service providersYou may be a great fit if you possess the following qualifications:5-10+ years of relevant experience in Physical DesignProficiency with tools, workflows, and design methodologies spanning RTL synthesis to GDSII sign-offExperience in back-end design and timing closure on advanced process nodes (5nm and below)Familiarity with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler) automated RTL-to-GDSII flowsKnowledge of sign-off tools (PrimeTime, Tempus, Voltus, etc.)Expertise in UPF-based low power design methodologies, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysisCreative problem-solving skills with a first-principles approach

About LumilensAt Lumilens, we are pioneering the essential photonics infrastructure that will drive the AI supercomputing revolution of the future. From chip-to-chip optical interconnects to scalable photonic engines, we are unlocking a new era of computing that is faster, cooler, and significantly more efficient.Backed by Mayfield and led by industry veterans who have built and scaled transformative technologies, we are a well-funded startup. This is not just about incremental innovation; it’s a unique opportunity to fundamentally rethink the optical layer from silicon upwards. You will collaborate with world-class engineers to tackle some of the most challenging problems in optics, systems, and scalability. Each line of code, design decision, and breakthrough you contribute will play a vital role in shaping the infrastructure of tomorrow.If you seek a mission-driven environment with momentum and the chance to make a significant impact, join us on this exciting journey. We are just getting started.About the RoleAs an Optical Design Engineer, you will be instrumental in developing and validating the coupling optics essential for delivering optical signals of up to 1.6 Tb/s into our customers’ networks.Primary Duties & ResponsibilitiesLeverage raytracing software tools (e.g., Zemax) to conduct optical simulations and design lens and fiber-based coupling solutions for Silicon Photonics-based electro-optical components.Consult with suppliers on optics design concepts and solutions to enhance the performance of optical transceivers.Design and execute experiments to assess the performance of optical coupling solutions.Offer expert technical support to mechanical designers and process engineers to ensure optimal performance under realistic manufacturing conditions.

Archer Aviation, based in San Jose, California, is pioneering the development of an all-electric vertical takeoff and landing aircraft aimed at enhancing sustainable air mobility. Our innovative aircraft is designed to carry four passengers while minimizing noise pollution.We are committed to addressing ambitious challenges, and we believe that a diverse workplace fosters intelligence, drives insightful perspectives, and ultimately leads to collective success. Our focus is on creating an equitable and inclusive environment that respects and celebrates our unique differences among team members.As a member of this team, you will:Develop Archer’s multi-disciplinary optimization (MDO) engine, workflows, and high-performance computing resources for aircraft concept development.Translate business objectives and use cases into optimization targets and constraints.Utilize the MDO engine to generate optimal vehicle designs tailored to specific use cases.Effectively communicate findings to stakeholders, supporting executive decision-making processes.Assist systems engineers in converting their designs into high-level requirements and collaborate with the broader Archer engineering team to bring designs to fruition.