About the job
Join d-Matrix, where we are dedicated to harnessing the transformative power of generative AI to revolutionize technology. We are pioneers in both software and hardware innovation, constantly pushing the limits of what is achievable. Our culture is rooted in respect and collaboration.
We embrace humility and prioritize direct communication. Our inclusive team thrives on diverse viewpoints, leading to enhanced solutions. We are on the lookout for passionate individuals eager to confront challenges and committed to execution. Are you ready to explore your playground? Together, we can unlock the infinite possibilities of AI.
Location:
This is a hybrid position, requiring onsite work at our Sydney, Australia office three days a week.
About the Role: Senior Runtime Software Engineer
Your Responsibilities:
At d-Matrix, we are developing an AI inference processor aimed at accelerating inference for NLP, vision, and recommendation workloads within a data center environment. Our architecture incorporates an in-memory compute processor subsystem, utilizing both fixed and floating-point data types in dense and sparse matrix processing modes. During our seed round, we successfully developed a CMOS test chip and validated our architecture using genuine inference workloads compiled from PyTorch.
As a Senior Runtime Software Engineer, you will play a vital role in the architecture, development, and validation of firmware/software that operates on the system-on-chip’s multiple processors, low-level drivers, and system programs. You will take charge of optimizing runtime performance for the silicon product, documenting and developing firmware that runs across various on-chip multi-core CPU subsystems.
Your efforts will maximize hardware utilization while minimizing communication bottlenecks and enhancing on-chip memory usage. You will be responsible for bringing the software up on FPGA platforms that replicate the embedded CPU subsystems, debugging through JTAG-connected IDEs, and developing firmware solutions ahead of the AI subsystem hardware availability.
Additionally, you will manage the delivery timeline and ensure compliance with d-Matrix coding and methodology guidelines while collaborating closely with hardware teams to interpret specifications and propose enhancements.

