Principal Power Architect

Join our team as a Principal Power Architect, where you will lead the development of a comprehensive power and energy strategy for our Solid-State Drive (SSD) and System-on-Chip (SoC) platforms. This pivotal role is responsible for shaping the architectural vision, policies, and execution strategies that guarantee our products deliver top-tier performance per watt, exceptional thermal efficiency, and reliable power behavior across various applications, including client, enterprise, and hyperscale systems. As the designated 'Power Tsar' of our organization, you will be the primary authority on SSD power architecture, encompassing SoC design, firmware, NAND management, and platform integration. You will work collaboratively with hardware, firmware, NAND, and system teams to explore innovative power management techniques that do not compromise responsiveness, quality of service, or reliability.Key ResponsibilitiesDefine the holistic power architecture for next-generation SSD SoCs, incorporating policies for active, idle, and deep-sleep modes.Architect dynamic power management (DPM) strategies across firmware, SoC, and NAND subsystems.Lead power-performance trade-off analysis and set architectural benchmarks for performance-per-watt across diverse workloads and use cases.Collaborate with SoC teams to establish clock, voltage, and domain partitioning strategies, including fine-grained power gating and dynamic frequency scaling (DVFS).Engage with firmware architects to co-design firmware power governors, workload-aware throttling, and adaptive power modes.Examine and model real-world power telemetry, developing predictive power models that inform SoC and firmware design.Create power measurement and validation methodologies, aligning simulation, emulation, and silicon data.Work alongside NAND engineering to characterize and enhance flash operation power profiles, particularly in mixed workload and sustained write scenarios.Drive thermal design constraints and performance guard bands in conjunction with mechanical and packaging teams.Benchmark competitive solutions to ensure the company retains its leadership in energy efficiency and thermal scalability.

We are on the lookout for a highly skilled Senior Principal Engineer specializing in Storage Architecture to spearhead the performance definition, analysis, and optimization of our cutting-edge Solid-State Drive (SSD) and System-on-Chip (SoC) platforms. This pivotal role involves defining and steering the architectural interface between SoC hardware, firmware, and NAND subsystems, ensuring exceptional storage performance across client, enterprise, and hyperscale markets. As a vital technical leader within the SSD Architecture organization, you will work closely with cross-disciplinary teams—including SoC, firmware, NAND technology, system validation, and product engineering—to drive innovations in latency, Quality of Service (QoS), throughput, and power efficiency.Key Responsibilities:Design and model the SoC-to-FW interface to enhance data paths, command handling, and QoS mechanisms.Establish performance targets and metrics for new SSD product lines and SoC platforms.Create and improve system-level performance models (simulation and analytical) to accurately forecast SSD behavior under real-world workloads.Examine firmware execution pipelines and hardware offloading opportunities to reduce latency, improve IOPS, and enhance efficiency.Lead bottleneck analysis and performance triage across hardware, firmware, and NAND media layers.Collaborate with SoC design teams to establish DMA, interrupt, queue, and cache architectures that support high-performance I/O.Work with firmware teams to define command flows, queue management, and scheduling algorithms that align with architectural intent.Advance performance validation methodologies, tools, and ensure correlation between simulation and silicon outputs.Assess emerging interface technologies (PCIe/NVMe, CXL, UCIe) and their implications for future architecture.Provide technical mentorship and thought leadership within the broader R&D and product development organization.