High Performance Computing (HPC) Engineer

Located in the heart of Silicon Valley, genbio is an innovative start-up where a dynamic team of scientists, engineers, and entrepreneurs is revolutionizing the fields of biology and medicine through the transformative capabilities of Generative AI. Our team is composed of trailblazers in AI and Biological Sciences, continually redefining the limits of what can be achieved. We envision a groundbreaking paradigm shift in biology and medicine.At genbio, our mission is to provide a comprehensive understanding of biology, paving the way for the next generation of life-altering solutions. As a pioneer in pan-modal Large Biological Models (LBM), we are leading a new chapter in biomedicine, with our LBM training facilitating extraordinary advancements and a reimagined approach to healthcare. Our robust R&D team and expertise in LLM and generative AI place us at the cutting edge of this transformative industry. With our headquarters in California and a branch office in Paris, we are set to make a significant global impact. Join us on our journey to reshape the future of biology and medicine through the revolutionary power of Generative AI.

About xAIAt xAI, we are on a mission to develop advanced AI systems that can profoundly comprehend the universe and support humanity in its quest for knowledge. Our team is compact yet highly driven, emphasizing engineering excellence and innovation. We seek individuals who relish challenges and thrive on curiosity, contributing directly to our mission in a collaborative, flat organizational structure. Initiative and a commitment to delivering outstanding results are paramount. Strong communication skills are essential, enabling team members to convey knowledge effectively and precisely. About the RolexAI has pioneered the creation of a 100k GPU cluster on an Ethernet network, achieving this remarkable feat twice in just 92 days. We are currently seeking an experienced engineer proficient in RoCEv2 to scale our operations while enhancing performance and reliability.Our rapid development pace with cutting-edge hardware is crucial in deepening our understanding of the universe. To achieve our next major breakthrough, we must take charge of our network performance and availability, optimizing them for our training models and customer inference queries. Your role will predominantly involve diving deep into NCCL, creating metric dashboards, and fine-tuning configurations to maximize performance. You will play a pivotal role in designing the next generation of our backend and front-end networks, enabling seamless expansion of our GPU infrastructure with minimal engineering intervention.Expect considerable travel to Memphis for capacity expansion, participation in team on-call rotations, and assistance with scaling and maintenance initiatives. This position promises to be both dynamic and rewarding.

At PsiQuantum, our mission is to revolutionize computing by creating the first practical quantum computers—machines that promise to achieve breakthroughs previously thought impossible. Since our inception in 2016, we have been dedicated to developing million-qubit, fault-tolerant quantum systems.Quantum computers leverage the principles of quantum mechanics to tackle challenges far beyond the capabilities of even the most advanced supercomputers and AI systems. The implications of this technology will transform industries such as energy, pharmaceuticals, finance, agriculture, transportation, materials, and more.Our innovative architecture is grounded in silicon photonics, utilizing advanced semiconductor manufacturing techniques. Collaborating with industry leaders like GlobalFoundries, we employ high-volume production processes that yield billions of chips for telecommunications and consumer electronics. Photonics presents remarkable scalability advantages: photons are unaffected by heat, immune to electromagnetic interference, and seamlessly integrate with existing cryogenic cooling and standard fiber-optic frameworks.In 2024, PsiQuantum announced government-funded initiatives aimed at constructing our inaugural utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These projects underscore the growing acknowledgment of quantum computing's pivotal role in shaping the future and the urgency to scale our efforts.Additionally, PsiQuantum is at the forefront of developing the algorithms and software necessary to enhance the commercial viability of these systems. Our teams collaborate directly with eminent Fortune 500 companies—including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical—to ensure our quantum solutions deliver real-world impact.Quantum computing signifies not merely an extension of classical computing but a profound paradigm shift that paves the way for solving complex challenges that defy traditional methods. The potential is vast, and we possess a clear roadmap to actualizing this promise.Become a part of our groundbreaking journey.

About Us At vinci4d, we are revolutionizing the hardware design landscape with our cutting-edge AI assistant, aimed at empowering engineers to accelerate their design iterations by a staggering 1000 times.Our innovative foundation model, driven by geometry and physics, is tailored for each category of part design.We are on the lookout for passionate individuals who thrive on product development to enhance our Minimum Viable Product (MVP).Your ResponsibilitiesAs a pivotal member of our team, you will design and develop the essential pipelines and tools that transform our vision into reality. Your contributions will significantly expedite our development processes by facilitating smooth transitions from code development to deployment. Key responsibilities include:Enhancing product features for scalability and developing advanced APIs to support intricate engineering workflows.Establishing and integrating LLM or VLM infrastructure.Implementing an MLOps framework for training deep learning models using geometry and physics data.Collaborating with early customers and design partners to strategize and prioritize the development roadmap.Building and deploying critical product features.Gaining invaluable experience while creating products that resonate with engineers, and learning about the entrepreneurial journey.QualificationsA minimum of 6 years in developing and delivering features within the high-performance computing domain.Expertise in C++, Python, or any relevant language necessary for system setup, along with familiarity with tools such as gRPC, Protocol Buffers, Docker, Kubernetes, and Bazel.Experience with cloud computing for data generation, scraping, and assisting data science teams in model training with MLOps is a plus.CUDA experience is desirable but not mandatory.Frontend development experience is a bonus.Prior experience in a startup environment will be highly valued.You’ll Thrive in This Role If YouAre enthusiastic about entrepreneurship and the process of transforming ideas from concept to reality.

About VoltaiAt Voltai, we are pioneering innovative models and agents that learn, evaluate, plan, experiment, and engage with the physical world. Our initial focus is on the development of advanced hardware, specifically electronic systems and semiconductors, leveraging AI to surpass human cognitive capabilities in design and creation.About the TeamSupported by leading Silicon Valley investors and prestigious affiliates, including Stanford University and executives from tech giants like Google, AMD, Broadcom, and Marvell, our team comprises former Stanford professors, SAIL researchers, and award-winning Olympiad medalists. Additionally, our ranks include experienced CTOs from Synopsys and GlobalFoundries, as well as former high-ranking officials in U.S. defense and foreign policy.About this RoleIn this role, you will design and optimize power conversion and distribution systems tailored for high-performance computing and autonomous hardware. Responsibilities include architecting topologies, simulating efficiency trade-offs, and validating thermal and EMI performance under extreme conditions. Your contributions will ensure that AI systems function with optimal power integrity and minimal loss.

About xAIAt xAI, we are driven by our mission to develop AI systems that profoundly understand the universe and assist humanity in its quest for knowledge. Our team is composed of passionate individuals who thrive on challenges and curiosity, emphasizing engineering excellence. We maintain a flat organizational structure where every member is expected to actively contribute to our mission. Leadership is earned through initiative and consistent delivery of excellence, fostering a strong work ethic and prioritization skills. Effective communication is essential, enabling team members to share insights and knowledge clearly.About the RoleThe Compute Infrastructure team at xAI is tasked with the design, construction, and management of extensive clusters and orchestration platforms that facilitate cutting-edge AI training, inference, and agent workloads at an unprecedented scale. In this role, you will redefine container orchestration beyond current systems like Kubernetes, manage exascale computing resources, optimize for high-performance training runs and production services, and work closely with research and systems teams to deliver reliable, ultra-scalable infrastructure that powers xAI's next-generation models and applications.ResponsibilitiesConstruct and oversee large-scale clusters to host, persist, train, and serve AI workloads with exceptional reliability and performance.Design, develop, and enhance an in-house container orchestration platform that surpasses off-the-shelf solutions in scalability, isolation, resource efficiency, and fault-tolerance.Collaborate with research teams to architect and optimize compute clusters tailored for extensive training runs, inference services, and real-time applications.Profile, debug, and resolve intricate system-level performance bottlenecks, resource contention, scheduling dilemmas, and reliability issues across the entire stack.Take ownership of end-to-end infrastructure initiatives employing first-principles design, rigorous testing, automation, and continuous optimization to meet the demands of frontier AI compute.

Rivian and Volkswagen Group Technologies have joined forces in Palo Alto to advance electric vehicle innovation. This partnership brings together expertise in operating systems, zonal controllers, and cloud connectivity, aiming to set new standards for software-defined vehicles. The team addresses complex challenges in EVs, focusing on connectivity, AI, and security to build more intelligent and sustainable mobility solutions. Role overview The Hardware Systems Performance Engineer - Connectivity works closely with the Hardware Systems Architecture team to assess and optimize the performance of low-voltage electrical (LVE) systems in Rivian vehicles. The position influences hardware architecture decisions early in development and validates system designs in later phases. A strong grasp of systems software is essential to identify and measure performance metrics, anticipate design risks, and confirm that system performance meets established requirements. Areas of focus include wireless connectivity and passive/keyless vehicle access systems (VAS). What you will do Collaborate with hardware architecture, design, and software teams to create thorough plans for measuring key performance metrics, identifying system bottlenecks, and validating performance against requirements. Lead the design, integration, and automation of characterization and validation activities across a range of hardware testing environments, including early prototypes, lab vehicles, and hardware-in-the-loop (HIL) setups. Manage the full process of systems performance characterization, from developing requirements to finding solutions and automating processes. This includes integrating hardware and software, building data acquisition pipelines, and developing downstream data processing infrastructure.

Join Array Labs, a pioneering company dedicated to building state-of-the-art radar systems that empower humanity to monitor and react to the changes in our physical environment.As we embark on an exciting journey to launch a synchronized fleet of radar satellites, we aim to create a high-resolution 3D map of Earth, continuously updated in real-time. This innovative approach will facilitate rapid and intelligent decision-making for government and commercial entities engaged in disaster management, infrastructure stability, and crucial geopolitical insights.Our team is responsible for the complete lifecycle of satellite design and construction, resulting in the world’s most sophisticated Earth observation satellites. Our fleet promises unparalleled accuracy, extensive coverage, and immediate responsiveness, crucial for delivering vital insights exactly where they are needed.About the RoleAs the Lead High-Speed PCB Layout Engineer, you will take charge of the physical implementation of our high-speed digital and mixed-signal electronics using Altium. Your responsibilities will include translating schematics and performance requirements into practical designs, focusing on component placement, constraint-driven routing, stack-up definition, return path strategies, and managing the partitioning between sensitive mixed-signal areas and high-speed digital interfaces.In this collaborative role, you will work closely with electrical design, firmware, mechanical, and testing engineers to establish layout constraints, conduct reviews, and oversee manufacturing releases. The quality of the boards you produce will have a direct impact on signal integrity, power integrity, noise performance, and the overall reliability of our systems both in the lab and in orbit.

Join Array Labs, a pioneering company dedicated to building cutting-edge radar systems that empower humanity to comprehend and react to the transformations in our physical environment.We are embarking on an ambitious project to deploy a coordinated fleet of radar satellites, designed to generate a detailed and dynamic 3D representation of the Earth. This real-time mapping capability will facilitate agile and informed decision-making for both governmental and commercial entities engaged in disaster response, infrastructure resilience, and critical geopolitical intelligence.Our end-to-end design and manufacturing of the world's most advanced Earth observation satellites will deliver unmatched accuracy, extensive coverage, and rapid responsiveness, ensuring vital insights are provided exactly when and where they are needed.About the RoleAs a Senior High-Speed PCB Layout Engineer, you will take charge of the physical realization of high-speed digital and mixed-signal electronics for Array's projects using Altium. You will be responsible for transforming schematics and performance specifications into intricate layouts and functional designs. Your role will encompass component placement, constraint-driven routing, stack-up definition, return path and reference plane strategies, as well as partitioning between sensitive mixed-signal areas and high-speed digital connections.Collaboration is key; you will work closely with electrical design, firmware, mechanical, and test engineers to establish layout constraints, conduct reviews, and manage manufacturing releases. The boards you produce will play a crucial role in determining signal integrity, power integrity, noise performance, and overall system reliability, both in laboratory settings and in-orbit operations.

Senior Computer Vision and AI Engineer At BrightAI, we are at the forefront of revolutionizing how businesses engage with the physical world through advanced intelligent automation. Our innovative AI platform processes visual, spatial, and temporal data across billions of real-world events, from edge devices and mobile sensors to extensive cloud systems. Our diverse team comprises elite engineers and researchers from renowned companies such as Microsoft, Amazon, Tesla, and Meta. We are currently seeking a Senior Computer Vision and AI Engineer to lead the charge in shaping the future of real-time visual intelligence and deploying next-generation AI systems on a large scale. This role offers a remarkable opportunity to contribute to groundbreaking AI systems that are transforming physical infrastructure industries. You will be involved in applied research and the development of production-level machine learning and AI systems that facilitate real-time decision-making across various devices and services. This position demands extensive knowledge in computer vision, machine learning, and AI system design, with a strong emphasis on addressing real-world challenges. Collaborate closely with top-tier engineers and product leaders to define, construct, and launch state-of-the-art AI features integrated into our platform.

About Hippocratic AI Hippocratic AI develops generative AI technology for healthcare, focusing on safe, autonomous clinical conversations with patients. The company’s proprietary large language models (LLMs), part of the Polaris constellation, have achieved over 99.9% accuracy in clinical interactions. Our Mission and Team The goal at Hippocratic AI is to build the first healthcare-exclusive, safety-focused LLM platform to improve patient outcomes worldwide. The company was co-founded by CEO Munjal Shah, alongside physicians, hospital leaders, AI researchers, and scholars from institutions such as El Camino Health, Johns Hopkins, Washington University in St. Louis, Stanford, Google, Meta, Microsoft, and NVIDIA. Hippocratic AI is backed by leading healthcare and AI investors. The company recently closed a $126M Series C round at a $3.5B valuation, bringing total funding to $404M. Investors include Avenir Growth, CapitalG, General Catalyst, a16z, Kleiner Perkins, Premji Invest, UHS, Cincinnati Children’s, WellSpan Health, and individuals like John Doerr and Rick Klausner. Role Overview: Performance Engineer The Performance Engineer will own performance across the entire technology stack. This role involves building automated testing harnesses to uphold system integrity, regularly evaluating models, microservices, and infrastructure. The position also includes responsibility for VoIP quality characterization. The scope covers machine learning infrastructure, backend services, and real-time communications. Key Responsibilities Design and maintain automated performance testing frameworks for the full system, including LLM inference, REST/gRPC microservices, and infrastructure components (PostgreSQL, Redis, message queues, object storage). Integrate performance testing suites into CI/CD pipelines to monitor deployments for latency and throughput regressions. Define SLIs and SLOs, and build dashboards (such as Grafana) to give engineering teams real-time visibility into system health. Location This position is based in Palo Alto.

About ALSO: We are a forward-thinking electric mobility company born from Rivian, driven by a collective passion for innovation. Our dedicated team of builders and visionaries is committed to crafting entirely new, vertically integrated, small electric vehicles (EVs) that address the mobility challenges of both today and the future. Our mission is to encourage the world to embrace ALSO, transforming local transport by replacing traditional vehicles with more affordable, enjoyable, and significantly efficient options.We are in search of a Senior Staff Electrical Engineer, High Speed Design to spearhead the development of cutting-edge electronic systems for diverse micro-mobility platforms.Key Responsibilities:Act as the technical lead and hardware architect for a multidisciplinary engineering team focused on developing the next generation of light electric vehicle products.Design and architect complex custom embedded systems, overseeing component selection (high-performance MCUs, ICs, power converter controllers), schematic capture, and intricate HDI PCB layouts.Conduct simulations, analyses, and validations for high-speed signal integrity and power integrity, designing optimal PCB stack-ups and power delivery networks to support high-performance computing.Lead strategies for EMI/EMC mitigation at the system level, ensuring hardware meets regulatory standards on the first attempt and managing complex debugging efforts for any emissions issues.Oversee the entire module development lifecycle, establishing best practices for design and validation phases within the V-model development process.Collaborate with Systems, Firmware, Mechanical, Thermal, and Test engineers to ensure high reliability, seamless system integration, robust physical packaging of high-density boards, optimal thermal management, and thorough testability for mass production.Lead root cause analysis, complex debugging, and failure analysis of critical electrical systems and high-speed subsystems in vehicles.Cultivate technical relationships with PCB fabricators, silicon vendors, and contract manufacturers to evaluate cutting-edge components, ensure HDI DFM/DFA, and qualify advanced manufacturing processes.Act as a force multiplier for the hardware team by mentoring junior and mid-level engineers, leading technical design reviews, and enhancing engineering efficiency across the organization.

About Arc InstituteThe Arc Institute is a pioneering scientific institution dedicated to curiosity-driven fundamental research and technology advancement aimed at understanding and addressing complex human diseases. Based in Palo Alto, California, Arc operates as an independent research organization, collaborating closely with renowned institutions like Stanford University, UCSF, and UC Berkeley.While traditional university research has achieved remarkable outcomes, we advocate for innovative institutional models that can foster significant progress. Our core principles include:Funding: We fully support our Core Investigators' research endeavors, freeing scientists from the limitations of project-specific external grants.Technology: As biomedical research increasingly relies on sophisticated tools, our Technology Centers focus on developing, optimizing, and deploying cutting-edge experimental and computational technologies in partnership with Core Investigators.Support: We are committed to offering exceptional operational, financial, and scientific support to empower scientists in pursuing long-term, high-risk, high-reward projects that aim to make breakthroughs in curing diseases, including neurodegeneration, cancer, and immune dysfunction.Culture: We recognize the critical role of culture in scientific excellence and strive to cultivate an environment driven by scientific curiosity, unwavering commitment to truth, broad ambitions, and selfless collaboration.With a team of over 300 individuals, $650 million in committed funding, and a state-of-the-art laboratory facility in Palo Alto, we are poised to make a significant impact in the scientific community.Why this role could be your ideal opportunityTransform Data into Discovery: Step beyond conventional pipelines. You will spearhead our “Tertiary Analysis” initiatives, converting raw data into mechanistic insights that elucidate interactions between genes, drugs, and environments.Be Part of an Innovative Research Organization: Experience the dynamic fusion of startup agility and the intellectual rigor characteristic of a premier academic institute.Access Premier Datasets: Enjoy exclusive access to extensive, high-quality datasets—from T-cells and NGN2 neurons to comprehensive chemogenetic screens—specifically designed for large-scale scientific discovery.Lead with Independence: While a dedicated team manages essential bioinformatics infrastructure, you will have the autonomy to drive your research initiatives.

Join xAI, a pioneering company dedicated to building AI systems that enhance humanity's understanding of the universe. We are seeking a talented ML Infrastructure Network Development Engineer with a specialization in high-speed interconnect technologies. In this pivotal role, you will design, construct, and optimize the network architecture that underpins large-scale AI training and inference clusters. Your expertise will drive innovations in high-bandwidth, low-latency, and energy-efficient interconnects essential for our cutting-edge AI/ML infrastructures. You will engage with various interconnect modalities, ensuring seamless connectivity between GPUs and switches in data centers, and contribute to the overall success of our AI initiatives.

Latitude AI (lat.ai) is at the forefront of developing cutting-edge automated driving technologies, including Level 3 systems for Ford vehicles. Our mission is to transform the driving experience, making travel safer, less stressful, and more enjoyable for all.As part of the Latitude team, you will collaborate with leading experts in machine learning, robotics, cloud platforms, mapping, sensors, and safety engineering. Together, we are dedicated to making a significant, positive impact on the driving experience for millions.Operating as a subsidiary of Ford Motor Company, Latitude maintains the agility of a tech startup while developing automated driving technologies. Our headquarters is in Pittsburgh, with additional engineering centers in Dearborn, Michigan, and Palo Alto, California.Join Our Team:The Performance Prediction team is responsible for creating machine learning models, evaluation pipelines, and internal tools that enable us to monitor how autonomous behavior evolves with each software release. We tackle challenges in behavior classification, ride quality assessment, probabilistic trajectory forecasting, and regression analysis for releases.Our systems integrate both classical and modern ML approaches, employing compact classifiers like tree-based models for behavior and ride quality detection, as well as deep learning models for complex autonomy tasks. We also develop the software infrastructure around these models, including dataset definition, feature generation, training workflows, offline metrics, experiment tracking, and tools for regression inspection at detailed levels.This position is ideal for those who thrive on developing reliable Python systems and implementing rigorous ML evaluation methods in safety-critical environments. The work involves a blend of ML systems development, model evaluation, and internal tooling used by various teams across the autonomy spectrum.

About Matroid At Matroid, we strive to empower machines to comprehend visual information just as humans do. Our innovative products, designed for users with no programming background, allow industries to leverage advanced computer vision solutions effortlessly. By deploying state-of-the-art deep neural networks either in the cloud or on-premise with just a click, we revolutionize how businesses operate. Founded in 2016 by a Stanford professor, we have successfully raised $33.5 million from top-tier investors including NEA, Energize Ventures, and Intel Capital. Our diverse clientele spans manufacturing, industrial IoT, and security sectors. We are seeking a passionate Software Engineering Intern to join our Full Stack team, contributing to the development of our computer vision platform. You will have the opportunity to work in our newly established office in downtown Palo Alto, conveniently located near Stanford University and Caltrain.

About VoltaiVoltai is at the forefront of developing advanced world models and intelligent agents designed to learn, evaluate, plan, experiment, and interact with the physical environment. Our initial focus lies in understanding and innovating hardware, specifically in electronics systems and semiconductors, where artificial intelligence can surpass human cognitive capabilities.About Our TeamOur team is backed by prominent investors from Silicon Valley, Stanford University, and high-profile leaders from companies like Google, AMD, Broadcom, and Marvell. We comprise former Stanford faculty, researchers from SAIL, medalists from international Olympiads, and executives from leading tech firms, including Synopsys and GlobalFoundries, alongside notable figures from the U.S. government.Key ResponsibilitiesDevelop and optimize MPI+CUDA PDE solvers for electrostatics, charge transport, and electromagnetic field challenges on intricate 3D IC geometries utilizing multi-node GPU clusters.Enhance and extend AMG preconditioners, Krylov solvers, and mesh pipelines, ensuring performance and correctness at scale.Construct and train neural operators (FNO, DeepONet, GNO, and variants) as high-fidelity surrogates for PDE-based field solvers.Design simulation pipelines that yield training data for neural operator models, addressing sampling strategies, mesh management, and physical consistency checks.Conduct thorough validations, including analytical solutions, published benchmarks, and cross-validation between field solvers and learned surrogates.QualificationsPhD in Computational Physics, Applied Mathematics, Computational Engineering, or a closely related discipline.Extensive knowledge of numerical PDE methods: FEM, FVM, or BEM, including weak formulations, quadrature, convergence, and error analysis.Proficient in C++ and CUDA, with a focus on writing and optimizing kernels, memory hierarchy management, and multi-GPU programming.Experience with multi-node HPC: MPI, domain decomposition, collective communication, and scaling strategies.Deep understanding of sparse linear algebra, including Krylov methods, algebraic multigrid, and preconditioning techniques.Hands-on experience with neural operators (FNO, DeepONet, or similar), encompassing training, architecture design, and evaluation on PDE datasets.Solid grasp of AI applications in scientific research.

JOB SUMMARYThe Performance Improvement Advisor plays a critical role in enhancing the operational excellence of Lucile Packard Children's Hospital. This position is dedicated to spearheading impactful programs, projects, and processes aimed at fostering sustainable improvements throughout the organization. By nurturing a culture of continuous enhancement, the advisor provides expert guidance, coaching, and facilitation, empowering staff at all levels to effectively implement improvement methodologies.ESSENTIAL FUNCTIONSThis role encompasses a wide range of responsibilities, including but not limited to:Leading high-value transformational improvement initiatives across the organization using established improvement science practices.Ensuring alignment of improvement efforts with overall organizational objectives.Collaborating with operational leaders to manage process improvement projects that support various hospital departments.Utilizing diverse improvement science methods to assist teams in problem-solving.Applying analytical skills to interpret data for informed decision-making and issue resolution.Providing support and mentorship to teams executing improvement initiatives.Training and coaching hospital staff on process improvement principles and tools.Delivering clear, concise advice in high-pressure environments while adapting to changing priorities.All employees are expected to adhere to Joint Commission Requirements, demonstrating cultural sensitivity, ethical treatment, and a commitment to patient care and safety.

At PsiQuantum, our mission is to revolutionize the future of computing by developing the world's first practical quantum computers—machines designed to deliver unprecedented breakthroughs that the industry has long anticipated. Since our inception in 2016, we have dedicated ourselves to constructing and deploying million-qubit, fault-tolerant quantum systems. Our quantum computers leverage the principles of quantum mechanics to tackle complex challenges that are insurmountable for even the most powerful supercomputers and AI technologies. The transformative potential of quantum computing spans a multitude of sectors including energy, pharmaceuticals, finance, agriculture, transportation, materials, and beyond. Our innovative architecture is grounded in silicon photonics, allowing us to leverage advanced semiconductor manufacturing processes—collaborating with industry leaders like GlobalFoundries. This approach benefits from the scalability of photonics, which are immune to heat and electromagnetic interference, and seamlessly integrates with existing cryogenic cooling and fiber-optic infrastructure. In 2024, PsiQuantum announced government-funded projects aimed at establishing our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives underscore a growing consensus on the strategic and economic significance of quantum computing, signaling that now is the opportune moment for expansion. Additionally, PsiQuantum is actively engaged in developing the algorithms and software necessary to unlock the commercial potential of these systems. Our dedicated application, software, and industry teams collaborate closely with leading Fortune 500 companies such as Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical to tailor quantum solutions for tangible impact. Quantum computing signifies a paradigm shift beyond classical computing, representing a pathway to overcoming challenges that cannot be addressed through traditional methods. The possibilities are vast, and we have a clear roadmap to actualizing this potential. Join our team and be a part of this groundbreaking journey.

Rivian and Volkswagen Group Technologies, a joint venture based in Palo Alto, California, is shaping the future of electric vehicles with advanced operating systems, connectivity solutions, and zonal controllers. The team combines expertise in connectivity, artificial intelligence, and security to set new standards for software-defined vehicles worldwide. Role overview The Hardware Systems Performance Architect will join the Hardware Systems Architecture team, focusing on low-voltage electrical (LVE) systems performance within Rivian vehicles. This position centers on performance characterization for subsystems such as infotainment, telematics, wireless connectivity, networking, and camera monitoring. Insights from this role will guide hardware architecture choices early in development and validate system designs as they mature. A strong background in systems software is essential to identify key performance metrics, assess design risks, and confirm system architecture meets requirements. What you will do Lead collaboration between hardware architecture, design, and software application teams to create characterization plans that identify performance metrics and system bottlenecks. Translate broad functional and performance requirements into concrete subsystem architecture performance requirements, enabling ongoing validation and refinement. Oversee the design, integration, and automation of characterization and validation activities for hardware testing, including work with prototype boards and lab vehicles. Coordinate the full development cycle for systems and automation supporting performance characterization, from requirement definition to solution implementation.