Pre-Silicon Validation Engineer – FPGA at Happiest Minds Technologies | Bengaluru

Join Happiest Minds Technologies as a Pre-Silicon Validation Engineer specializing in FPGA, where you'll play a critical role in validating and debugging ASIC IP cores for various peripherals, including USB, PCIe, and Audio. This position is situated in the heart of Bangalore's Electronic City, working closely with a prominent Product Development Company.Key Responsibilities:Validate and debug ASIC IP cores on FPGA reference boards or emulation platforms.Develop and execute validation plans and automation strategies.Engage in hardware-software co-verification processes.Utilize VHDL/Verilog for coding tasks.Work with industry-standard platforms like Synopsys HAPS, ZeBu, and Palladium.Familiarity with scripting in Perl or Python is a plus.Knowledge of System Verilog and OVM/UVM is advantageous.

Join our team as an FPGA Design Engineer where you will play a critical role in the architecture and development of FPGA logic systems. We are seeking candidates with 3-5 years of experience who have a strong background in FPGA design and coding.Your Responsibilities:Develop and design FPGA architectures.Perform RTL coding in VHDL or Verilog.Conduct FPGA simulations using Modelsim or similar tools.Test FPGA on the board and troubleshoot any issues that arise.Work collaboratively with cross-functional teams to ensure successful project delivery.Note: We are specifically looking for professionals focused on FPGA design and coding, not those whose primary focus is on board design.

Join our dynamic team at Squircle IT Consulting Services as a Silicon Validation Engineer, where you will play a pivotal role in ensuring the quality and performance of cutting-edge silicon products. You will collaborate with cross-functional teams to develop validation plans, execute tests, and analyze results, driving continuous improvements in our silicon design and manufacturing processes.

Join our dynamic team at Happiest Minds Technologies as a Mulesoft Developer, where you will design, develop, and deploy Mule ESB flows using the latest Mule versions (3.5 and above). You will be responsible for hands-on coding of Mule ESB (Enterprise Service Bus) flows and developing Web Services (both REST and SOAP-based). Your expertise in JAVA/J2EE technologies, including JMS, JDBC, and MAIL will be essential for this role. You will also develop XML, XSLT, and XML Schemas while working with Continuous Integration (CI) tools such as Jenkins and Maven. We are seeking candidates with 2-3+ years of experience in integration technologies like Web Services, SOA, and ESB.

Job DescriptionJoin our innovative team at Astrome Technologies, where we are pioneering advanced 5G-ready wireless systems designed to meet the high bandwidth networking needs of both rural and urban environments. We are seeking highly driven candidates with substantial hands-on experience in System Verilog programming specifically for wireless baseband design. Engage in the architecture definition, implementation, and development of comprehensive test plans. Design and implement RTL-level blocks, conduct synthesis, deploy on FPGAs, and troubleshoot timing violations. Collaborate with software and hardware teams to identify and resolve system issues effectively.

At Tenstorrent, we are at the forefront of AI technology, reshaping the landscape of performance, usability, and cost-effectiveness. As AI transforms computing paradigms, our solutions evolve to integrate advancements in software models, compilers, platforms, networking, and semiconductors. Our passionate team of engineers has successfully developed a high-performance RISC-V CPU from the ground up, embodying our commitment to innovation. We cherish teamwork, curiosity, and a resolute approach to tackling complex challenges. We are expanding our team and are eager to welcome contributors of all levels.We are in search of a Post-Silicon Validation Engineer who will be pivotal in the bring-up, validation, and debugging of RISC-V-based System on Chips (SoCs). This role is integral, melding silicon, firmware, and system software, necessitating hands-on laboratory experience and a thorough understanding of SoC architectures.You will take charge of post-silicon validation from the initial silicon bring-up through to production readiness, collaborating closely with design, pre-silicon verification, firmware, and software teams.This position is hybrid, based in Bangalore.We encourage applicants at various experience levels. During the interview process, we will evaluate candidates to ensure the appropriate level of placement, which may differ from this posting.

About Us Graphcore is a globally recognized leader in artificial intelligence computing systems. We design cutting-edge semiconductors and data center hardware that deliver the specialized processing power necessary to drive AI innovation while ensuring the efficiency required for broader adoption. As part of the SoftBank Group, Graphcore belongs to an elite family of companies driving some of the world’s most transformative technologies. Job Summary We are in search of talented silicon physical design engineers to enhance our already exceptional team. We have diverse roles available, catering to individuals with a wide range of skills and experiences, although we will consider exceptional candidates with less experience. We seek collaborative and proactive team players focused on achieving shared goals and creating optimal engineering solutions. Excellent communication skills and the ability to adapt and learn are crucial as we prioritize the right characteristics over specific experience. For the successful candidate, we offer a transparent, honest, and collaborative environment where you will work on cutting-edge designs at the most advanced nodes. Our engineers are not confined to silos; they are trusted and encouraged to take ownership of their designs and problem-solving. You will join a team that constantly seeks to improve every aspect of our work: our designs, flows, methodologies, and infrastructure. The Team The physical design team operates within the broader silicon design team, which includes RTL, verification, and DFT, with whom we collaborate extensively. Our work involves strong ties with architecture, packaging, and product engineering. We are responsible for collaborating with these teams to create high-quality RTL and ultimately build the final chip layout (e.g., GDSII), ensuring a signoff-quality design is delivered to the foundry (e.g., TSMC). Responsibilities and Duties Applicants are expected to technically contribute to developing Graphcore's next generation of AI superchips, focusing on creating robust, high-performance, and power-efficient designs in leading-edge process technologies while adhering to ambitious development schedules. Contributions will span multiple areas, including: Utilizing state-of-the-art EDA tools and in-house Graphcore flows to deliver final designs of sign-off quality. Enhancing existing flows and in-house tools/APIs to support new features and/or methodologies. Analyzing and debugging complex engineering problems to arrive at workable solutions. Collaborating with cross-functional teams to ensure the successful integration of designs and specifications.

Ajax Systems designs and manufactures security technology used by over 4.5 million end users and 330,000 professionals across more than 180 countries. The company offers a wide range of devices, including solutions for intrusion protection, video surveillance, fire and life safety, as well as automation for both residential and commercial spaces. Ajax Systems is expanding its presence in the ASEAN region, with a new 8,300 m² manufacturing facility in Hanoi, Vietnam. This investment increases production capacity and supports the company's commitment to serving local markets through strong partnerships and a broad commercial reach. Resilience and a focus on quality drive Ajax Systems' mission. The company was founded in challenging circumstances and continues to prioritize the development of reliable security and automation products that address changing threats.

About Us Graphcore stands as a globally recognized innovator in Artificial Intelligence computing systems. Our company specializes in designing cutting-edge semiconductors and data center hardware that deliver the specialized processing power necessary for advancing AI innovation, while ensuring operational efficiency to facilitate its wider adoption. As a proud member of the SoftBank Group, Graphcore is part of an elite network of companies that are at the forefront of transformative technologies worldwide. Job Summary As a Senior Silicon Logical Design Engineer within our logical design team, you will oversee a diverse array of logical design responsibilities. Our team is tasked with the delivery of Microarchitecture and RTL designs, crucial for implementing the chip architecture specifications of Graphcore Silicon. You will collaborate closely with fellow engineers in the Silicon team to ensure high-quality micro-architecture and RTL delivery that aligns with the company’s objectives for Silicon deployment. Responsibilities and Duties Integrate IP and subsystems into top-level SoC designs Develop and maintain build and configuration environments Conduct synthesis, linting, CDC/RDC, and timing checks at the SoC level Support verification and physical design teams through clean interface hand-offs Debug and resolve integration-related issues across multiple hierarchies Contribute to the continuous enhancement of integration flows and automation Produce high-quality microarchitecture and relevant documentation Facilitate effective communication between sites to uphold consistent working practices

Job DescriptionAstrome Technologies is a pioneering company committed to creating cutting-edge wireless systems optimized for 5G connectivity, addressing the demanding bandwidth needs of both urban and rural environments. We are currently looking for a skilled and motivated Lead FPGA Design Engineer to spearhead the development of our advanced wireless baseband architecture.Drive the definition and execution of RTL architectures while contributing to the specification and design of intricate communication systems.Supervise and mentor a talented team of engineers focused on the design, verification, and implementation of RTL designs utilizing System Verilog.Perform design synthesis, implement solutions on FPGAs, and address any timing violations that may arise.Collaborate closely with both Software and Hardware teams to diagnose and enhance system performance challenges.Ensure compliance with established design methodologies and best practices at every stage of the development process.

Join Happiest Minds as an ASIC Verification Engineer: 5-8 years of experience required for 2 available positions.Independently develop a comprehensive verification environment utilizing advanced verification languages such as System Verilog.Implement methodologies based on OVM/UVM frameworks to enhance verification processes.Proficiency with Synopsys VCS and Mentor Questa is essential.Analyze and execute existing verification workflows while proactively refining the framework.Engage in the development and implementation of verification methodologies.

Design and develop innovative mechanical systems for enclosure structures, focusing on payload integration platforms and advanced mechanisms.Work collaboratively with cross-functional teams to establish mechanical requirements and seamlessly integrate subsystems into the overall system architecture.Utilize finite element analysis (FEA) and other simulation tools to assess the structural integrity of designs under operational loads.Create and maintain comprehensive design documentation, including CAD models, assemblies, and technical specifications.Supervise the fabrication and assembly of mechanical components, while coordinating testing to validate design performance metrics.Conduct thorough design reviews and evaluations to ensure adherence to industry standards and best practices.

Join Our Team as a Senior Silicon Verification Engineer!At Graphcore, a global leader in Artificial Intelligence computing systems, we are seeking a Senior Silicon Verification Engineer to join our innovative team in Bengaluru. Here, you will play a vital role in ensuring our advanced semiconductors and data center hardware meet the rigorous specifications needed to drive AI innovation.As part of the prestigious SoftBank Group, Graphcore is at the forefront of transformative technologies. Our new AI Engineering Campus in Bengaluru is pivotal in shaping the future of AI computing, and we invite you to be part of this exciting journey.The Silicon Verification team is crucial within the overall Silicon design group. You will be responsible for verifying that the Register Transfer Level (RTL) created aligns perfectly with the architectural specifications, thereby ensuring the quality of our silicon delivery.

Role Overview Renesas Electronics Corporation is seeking a Senior Validation Engineer in Bengaluru. This position focuses on validating advanced electronic solutions to ensure they meet strict quality and performance standards. What You Will Do Design test plans for electronic products Execute validation tests and document procedures Analyze test results to identify issues and areas for improvement Work closely with cross-functional teams throughout the validation process

SeviTech Systems is seeking a talented and experienced FPGA RTL Design Engineer / Senior Engineer to join our innovative team.As an integral part of our design team, you will be tasked with developing micro-architecture at the IP/sub-system level and executing RTL coding to create robust FPGA solutions.Your responsibilities will include preparing timing constraints for block/sub-systems, integrating various IPs/sub-systems, and conducting verification processes in IP environments or FPGA setups.

Role Overview Renesas Electronics Corporation is hiring a Senior Hardware Validation Engineer in Bengaluru. This role focuses on maintaining high standards for hardware product quality. The engineer will work closely with teams from various disciplines to shape validation strategies, carry out test plans, and document hardware performance. What You Will Do Develop and refine validation strategies for hardware products Execute detailed test plans to assess product performance Collaborate with cross-functional teams throughout the validation process Create and deliver thorough reports on hardware testing outcomes Impact This position directly supports the development of new technologies at Renesas, helping ensure that products meet quality expectations before release.

Join our team as a Staff Engineer in SSD Validation, where you will play a crucial role in ensuring the quality and performance of our Solid State Drives (SSDs). Your expertise will contribute to innovative solutions that enhance the user experience for individuals with disabilities. As part of a diverse and inclusive environment, you'll have the opportunity to work alongside talented engineers while making a positive impact in the tech industry.

Join the Team as a Staff Silicon Verification EngineerGraphcore is a renowned leader in the field of Artificial Intelligence computing systems. Our innovative designs of advanced semiconductors and data center hardware provide the specialized processing capabilities that foster AI advancements while ensuring efficiency for widespread adoption.We are part of the illustrious SoftBank Group, collaborating with some of the most transformative companies in technology. Our new AI Engineering Campus in Bengaluru will be pivotal in shaping the future of AI computing.The Silicon Verification Engineer will play a crucial role within our Silicon design team, ensuring that the RTL produced by our logical design team aligns with the architectural specifications for Graphcore silicon. You will be integral to our verification activities, helping the team achieve its objectives for delivering high-quality silicon.Key Responsibilities:Develop verification plans and specifications, ensuring functional coverage closure.Provide insightful feedback to architects and design teams.Collaborate with cross-functional teams to enhance verification methodologies.

VINIRMA Consulting Pvt. Ltd. is a leading firm specializing in 360-degree Human Resource Management Consulting and Staffing Services. We operate globally, with a presence in the UAE, Qatar, Bahrain, Australia, the USA, Singapore, and India.We are currently seeking a skilled Validation Engineer (AMS/Cosim) to join one of our esteemed clients in Bangalore. This role is ideal for individuals with expertise in electronic design validation and simulation.

Cerebras Systems is at the forefront of AI innovation, developing the world's largest AI chip, which is 56 times larger than traditional GPUs. Our unique wafer-scale architecture delivers the AI computing power equivalent to dozens of GPUs on a single chip, providing the ease of programming as if it were a single device. This pioneering approach enables Cerebras to achieve unmatched training and inference speeds, allowing machine learning practitioners to run extensive ML applications effortlessly, without the cumbersome task of managing numerous GPUs or TPUs.  Cerebras' esteemed clientele comprises leading model labs, global corporations, and innovative AI-native startups. Recently, OpenAI announced a multi-year collaboration with Cerebras to harness 750 megawatts of scale, revolutionizing critical workloads with ultra-high-speed inference. With our groundbreaking wafer-scale architecture, Cerebras Inference offers the swiftest Generative AI inference solution globally, exceeding the performance of GPU-based hyperscale cloud inference services by over tenfold. This remarkable enhancement in speed is revolutionizing the user experience of AI applications, facilitating real-time iteration and boosting intelligence through enhanced computational capabilities. The Role:In this dynamic position, you will oversee the bring-up and optimizations of Cerebras's Wafer Scale Engine (WSE). The ideal candidate will possess a robust background in delivering end-to-end solutions, collaborating closely with teams across chip design, system performance, software development, and productization.Responsibilities:Develop and debug processes for Wafer Scale Engines, integrating well-tested and deployable optimizations into production workflows to mitigate time and costs.Refine AI Systems by navigating hardware/software design constraints such as di/dt, V-F characterization space, and current and temperature limits to enhance performance.Create and enhance the infrastructure to support silicon for real-world workload testing.Establish self-checking metrics and instrumentation for debugging and coverage analysis.