About the job
About Etched
Etched builds AI inference systems tailored for transformers, delivering over 10x the performance of traditional approaches while cutting costs and latency. The company’s custom ASICs make possible new products, such as real-time video generation models and advanced deep reasoning agents, that were previously out of reach. Backed by major investors and a team of experienced engineers, Etched is changing the landscape of AI infrastructure.
DFT Intern – San Jose
Role Overview
The DFT Intern will help review and improve Design-for-Test (DFT) flow automation to support chip-level regression on Etched’s Caelius platform. This role works closely with both frontend and backend design teams, supports DFT verification (including MBIST, Scan, BSCAN, and SSN simulations), and helps develop flows for ATPG fault models. Prior DFT experience is not required, but the ability to learn quickly and work independently is important.
What You Will Do
- Review and enhance automation for DFT flows
- Collaborate with frontend and backend design teams
- Contribute to DFT verification, including MBIST, Scan, BSCAN, and SSN simulations
- Develop flows for various ATPG fault models
What We Look For
- Ability to learn quickly in a self-directed setting
- Interest in working with advanced ASIC platforms
- Willingness to collaborate with cross-functional engineering teams
- No prior DFT experience required

