About the job
- Design and implement layouts in cutting-edge CMOS technologies, focusing on floor planning, placement, routing, DRC, LVS, and more.
- Experience with technology nodes such as 22nm, 28nm, 45nm, and 65nm, specifically in analog mixed-signal blocks including PLLs, bandgap references, ADCs, DACs, SERDES, and IOs.
- Proficiency in tools such as Virtuoso L/XL/GXL, IC12.1, and Calibre is essential.
- Familiarity with automated place and route tools like ICC and SOC Encounter is a significant advantage.
- Collaborate closely with circuit designers to ensure compliance with design specifications.
- Strong teamwork, communication skills, and problem-solving abilities are a must.
- Ability to work collaboratively across various teams with integrity and professionalism.
- Exhibit strong analytical skills and effective communication.

